18146920. Physical Adjustment to System Memory with Chipset Attached Memory simplified abstract (Advanced Micro Devices, Inc.)
Contents
- 1 Physical Adjustment to System Memory with Chipset Attached Memory
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 Physical Adjustment to System Memory with Chipset Attached Memory - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Key Features and Innovation
- 1.6 Potential Applications
- 1.7 Problems Solved
- 1.8 Benefits
- 1.9 Commercial Applications
- 1.10 Questions about the Technology
- 1.11 Original Abstract Submitted
Physical Adjustment to System Memory with Chipset Attached Memory
Organization Name
Inventor(s)
Jerry Anton Ahrens of Sister Bay WI (US)
William Robert Alverson of Del Valle TX (US)
Joshua Taylor Knight of Georgetown TX (US)
Amitabh Mehra of Fort Collins CO (US)
Anil Harwani of Austin TX (US)
Grant Evan Ley of Eden UT (US)
Physical Adjustment to System Memory with Chipset Attached Memory - A simplified explanation of the abstract
This abstract first appeared for US patent application 18146920 titled 'Physical Adjustment to System Memory with Chipset Attached Memory
Simplified Explanation
The patent application describes a method for making physical adjustments to system memory by transferring contents to chipset attached memory while adjustments are made, and then transferring them back once adjustments are complete.
- An indication for making physical adjustments to system memory is received.
- Contents of the system memory are transferred to chipset attached memory via a chipset link.
- The device operates using the contents from the chipset attached memory during adjustments.
- After adjustments, the contents are transferred back to the adjusted system memory via the chipset link.
Key Features and Innovation
- Method for making physical adjustments to system memory.
- Transfer of contents to chipset attached memory during adjustments.
- Seamless operation of the device using chipset attached memory.
- Transfer of contents back to adjusted system memory after adjustments.
Potential Applications
This technology could be applied in devices where system memory needs to be adjusted without interrupting operation, such as in servers, computers, or mobile devices.
Problems Solved
This technology solves the problem of making physical adjustments to system memory without causing downtime or interruptions in device operation.
Benefits
- Allows for seamless adjustment of system memory.
- Prevents interruptions in device operation during memory adjustments.
- Enhances the efficiency of memory management in devices.
Commercial Applications
- Data centers could benefit from this technology to optimize memory usage without downtime.
- Computer manufacturers could integrate this technology to improve the performance of their devices.
Questions about the Technology
How does this technology improve memory management in devices?
This technology allows for physical adjustments to system memory without interrupting device operation, leading to more efficient memory management.
What are the potential applications of this technology in the market?
This technology could be used in various devices such as servers, computers, and mobile devices to optimize memory usage without causing downtime.
Original Abstract Submitted
Physical adjustment to system memory with chipset attached memory is described. In accordance with the described techniques, an indication for making one or more physical adjustments to system memory of a device is received. Contents of the system memory are transferred via a chipset link to a chipset attached memory. The device is operated using the contents from the chipset attached memory while the one or more physical adjustments are made to adjust the system memory. After the one or more physical adjustments, the contents are transferred back from the chipset attached memory to the adjusted system memory via the chipset link.
