18143756. SEMICONDUCTOR MEMORY DEVICE CAPABLE OF EXPANDING BANK CAPACITY ADAPTIVELY TO PACKAGE SIZE AND METHOD OF DESIGNING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR MEMORY DEVICE CAPABLE OF EXPANDING BANK CAPACITY ADAPTIVELY TO PACKAGE SIZE AND METHOD OF DESIGNING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Ik-Joon Choi of Suwon-si (KR)

Kihyun Kim of Suwon-si (KR)

Sungchul Park of Suwon-si (KR)

Minjun Kim of Suwon-si (KR)

Junhyung Kim of Suwon-si (KR)

SEMICONDUCTOR MEMORY DEVICE CAPABLE OF EXPANDING BANK CAPACITY ADAPTIVELY TO PACKAGE SIZE AND METHOD OF DESIGNING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18143756 titled 'SEMICONDUCTOR MEMORY DEVICE CAPABLE OF EXPANDING BANK CAPACITY ADAPTIVELY TO PACKAGE SIZE AND METHOD OF DESIGNING THE SAME

Simplified Explanation

The semiconductor memory device described in the patent application includes multiple physical banks arranged in a row direction, with each bank being entirely or partially included in either a first logic bank or a second logic bank. The total width of the physical banks in the row direction compared to their height in the column direction results in a specific ratio that is not a multiple of 2.

  • Each physical bank is configured to be part of a first logic bank or a second logic bank.
  • The physical banks are arranged in a row direction.
  • The total width of the physical banks in the row direction compared to their height in the column direction is a specific ratio that is not a multiple of 2.

Potential Applications

  • Memory devices with improved organization and efficiency.
  • Semiconductor devices with optimized layout for better performance.

Problems Solved

  • Efficient organization of memory banks.
  • Optimal use of space in semiconductor devices.

Benefits

  • Improved performance in memory operations.
  • Enhanced efficiency in semiconductor devices.


Original Abstract Submitted

A semiconductor memory device includes n physical banks, each of which is configured to be entirely or partially included in one of a first logic bank or a second logic bank and arranged in a row direction, wherein n is an integer that is greater than or equal to 3, and wherein a proportion of a sum of respective widths of the n physical banks in the row direction to a height of the n physical banks in a column direction is a real number multiple that is not a multiple of 2.