18122895. Embedded Package with Shielding Pad simplified abstract (Infineon Technologies AG)
Contents
Embedded Package with Shielding Pad
Organization Name
Inventor(s)
Robert Fehler of Regensburg (DE)
Angela Kessler of Sinzing (DE)
Kushal Kshirsagar of Fremont CA (US)
Emanuele Bodano of Villach (AT)
Martin Benisek of Regensburg (DE)
Embedded Package with Shielding Pad - A simplified explanation of the abstract
This abstract first appeared for US patent application 18122895 titled 'Embedded Package with Shielding Pad
The semiconductor package described in the patent application consists of a laminate package substrate with embedded power transistor dies and a driver die. The package also includes I/O routings connected to the driver die, a switching signal pad connected to the power transistor dies, and a shielding pad for electrical shielding during operation.
- Laminate package substrate with embedded power transistor dies and a driver die
- I/O routings connected to the driver die
- Switching signal pad connected to the power transistor dies
- Shielding pad for electrical shielding during operation
- Enhanced functionality and protection for power transistor dies
Potential Applications: - Power electronics - Automotive industry - Industrial automation
Problems Solved: - Improved electrical connectivity and shielding - Enhanced performance and reliability of power transistors
Benefits: - Increased efficiency in power electronics - Enhanced protection for semiconductor components - Improved overall system reliability
Commercial Applications: Title: "Advanced Semiconductor Package for Power Electronics Applications" This technology can be utilized in various commercial applications such as electric vehicles, renewable energy systems, and industrial machinery. The enhanced functionality and protection provided by the semiconductor package can lead to improved performance and reliability in these applications, ultimately benefiting manufacturers and end-users.
Questions about the technology: 1. How does the shielding pad in the semiconductor package contribute to the overall performance of the power transistors? 2. What are the specific advantages of using a laminate package substrate for embedding power transistor dies in comparison to other packaging methods?
Original Abstract Submitted
A semiconductor package includes a laminate package substrate, first and second power transistor dies embedded within the laminate package substrate, a driver die embedded within the laminate package substrate, a plurality of I/O routings electrically connected with I/O terminals of the driver die, a switching signal pad electrically connected with a second load terminal of the first power transistor die and a first load terminal of the second power transistor die, and a shielding pad that is configured to electrically shield at least one of the I/O routings from the switching signal pad during operation of the first and second power transistor dies.
