18121404. SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION simplified abstract (Apple Inc.)
Contents
SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION
Organization Name
Inventor(s)
Karim M. Megawer of San Diego CA (US)
Jongmin Park of San Diego CA (US)
SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18121404 titled 'SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION
Abstract: This disclosure is directed to PLLs, and, in particular, to enhancing PLL performance via gain calibration. PLL loop gain may vary with respect to process, voltage, and temperature (PVT) variation. To control the PLL loop gain, a gain calibration loop may be implemented. However, calibrating the loop gain by directly measuring the loop gain may be disadvantageous. To reduce or eliminate PLL loop gain variation due to PVT variation, a PLL having a loop gain function that is a function of an input phase offset time with a phase noise performance that remains consistent across PVT variations is disclosed. By determining a relationship between PLL loop gain and phase offset, detecting and calibrating phase offset may result in enhanced calibration of the PLL loop gain, while avoiding the additional difficulty and complexity associated with directly measuring loop gain of a PLL.
- Simplified Explanation:
This patent application focuses on improving PLL performance through gain calibration without the need for direct measurement of loop gain. By utilizing a loop gain function based on phase offset time, the PLL can maintain consistent phase noise performance across process, voltage, and temperature variations.
- Key Features and Innovation:
- Enhancing PLL performance through gain calibration - Utilizing a loop gain function based on phase offset time - Consistent phase noise performance across PVT variations - Avoiding direct measurement of loop gain for calibration
- Potential Applications:
- Communication systems - Wireless devices - Frequency synthesizers - Clock generation circuits
- Problems Solved:
- Variation in PLL loop gain due to PVT variations - Difficulty in directly measuring loop gain for calibration
- Benefits:
- Improved PLL performance - Enhanced phase noise performance - Simplified calibration process - Increased stability across PVT variations
- Commercial Applications:
Title: Enhanced PLL Performance through Gain Calibration This technology can be applied in various commercial sectors such as telecommunications, IoT devices, and radar systems. It offers improved stability and performance in frequency control applications, making it valuable for companies in the wireless communication and semiconductor industries.
- Questions about PLLs:
1. How does the PLL loop gain affect the overall performance of a system? The PLL loop gain plays a crucial role in determining the stability and frequency accuracy of a system. By calibrating the loop gain, the system can achieve better performance and reliability.
2. What are the challenges associated with directly measuring the loop gain of a PLL? Directly measuring the loop gain of a PLL can be complex and may not provide accurate results due to process, voltage, and temperature variations. By using a loop gain function based on phase offset time, these challenges can be overcome.
Original Abstract Submitted
This disclosure is directed to PLLs, and, in particular, to enhancing PLL performance via gain calibration. PLL loop gain may vary with respect to process, voltage, and temperature (PVT) variation. To control the PLL loop gain, a gain calibration loop may be implemented. However, calibrating the loop gain by directly measuring the loop gain may be disadvantageous. To reduce or eliminate PLL loop gain variation due to PVT variation, a PLL having a loop gain function that is a function of an input phase offset time with a phase noise performance that remains consistent across PVT variations is disclosed. By determining a relationship between PLL loop gain and phase offset, detecting and calibrating phase offset may result in enhanced calibration of the PLL loop gain, while avoiding the additional difficulty and complexity associated with directly measuring loop gain of a PLL.
