18089499. DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING simplified abstract (Intel Corporation)
Contents
DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING
Organization Name
Inventor(s)
Andrew Wentzel of Tempe AZ (US)
Marcel Wall of Phoenix AZ (US)
Suddhasattwa Nad of Chandler AZ (US)
DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18089499 titled 'DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING
The abstract describes a package substrate made of a dielectric material with a conductive via that directly contacts the layer.
- The package substrate consists of a dielectric material layer.
- A via opening is present through the layer.
- A conductive via, with a uniform composition throughout its thickness, is located in the via opening.
- The conductive via makes direct contact with the layer.
Potential Applications: - Integrated circuits - Electronic packaging - Semiconductor devices
Problems Solved: - Enhances electrical connectivity - Improves signal transmission - Increases efficiency of electronic components
Benefits: - Enhanced performance of electronic devices - Improved reliability - Cost-effective manufacturing process
Commercial Applications: Title: "Innovative Package Substrate for Enhanced Electronic Performance" This technology can be utilized in the production of various electronic devices, such as smartphones, computers, and automotive electronics, to improve their overall performance and reliability.
Questions about Package Substrate: 1. How does the uniform composition of the conductive via impact the performance of electronic devices? - The uniform composition ensures consistent electrical conductivity, leading to improved signal transmission and overall device performance.
2. What are the key advantages of using a dielectric material layer in the package substrate? - The dielectric material provides insulation and protection for the electronic components, reducing the risk of electrical interference and damage.
Original Abstract Submitted
In an embodiment, a package substrate is described. In an embodiment, the package substrate comprises a layer, where the layer is a dielectric material. In an embodiment, a via opening is provided through a thickness of the layer. In an embodiment, a conductive via is in the via opening, where the conductive via has a substantially uniform composition throughout a thickness of the conductive via. In an embodiment the conductive via directly contacts the layer.
