18086942. PERFORMANCE OF BANK REFRESH simplified abstract (Advanced Micro Devices, Inc.)
Contents
PERFORMANCE OF BANK REFRESH
Organization Name
Inventor(s)
Kedarnath Balakrishnan of Bangalore (IN)
Guanhao Shen of Austin TX (US)
PERFORMANCE OF BANK REFRESH - A simplified explanation of the abstract
This abstract first appeared for US patent application 18086942 titled 'PERFORMANCE OF BANK REFRESH
The memory controller described in the patent application includes an arbiter that adjusts the priority of memory access requests based on certain conditions.
- The arbiter is designed to increase the priority of memory access requests that result in row activate commands when it receives a same-bank refresh request.
- Additionally, the arbiter is programmed to issue a same-bank refresh command upon receiving the same-bank refresh request.
Potential Applications: - This technology could be utilized in various computing systems that require efficient memory management. - It can be beneficial in improving the overall performance of memory controllers in devices such as smartphones, computers, and servers.
Problems Solved: - The technology addresses the issue of optimizing memory access requests in response to refresh commands, leading to enhanced system efficiency. - It helps in reducing latency and improving the overall speed of memory operations.
Benefits: - Improved memory access prioritization. - Enhanced system performance and efficiency. - Reduced latency in memory operations.
Commercial Applications: - The technology could be valuable for companies developing high-performance computing systems, data centers, and other memory-intensive applications. - It has the potential to enhance the competitiveness of products in the market by offering superior memory management capabilities.
Questions about the technology: 1. How does the arbiter in the memory controller determine the priority of memory access requests? 2. What are the potential implications of using this technology in data centers for large-scale operations?
Frequently Updated Research: - Stay updated on advancements in memory controller technology and related innovations to understand the evolving landscape of memory management solutions.
Original Abstract Submitted
A memory controller includes an arbiter. The arbiter is configured to elevate a priority of memory access requests that generate row activate commands in response to receiving a same-bank refresh request, and to send a same-bank refresh command in response to receiving the same-bank refresh request.
