18086229. VTFET CIRCUIT WITH OPTIMIZED MOL simplified abstract (International Business Machines Corporation)

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VTFET CIRCUIT WITH OPTIMIZED MOL

Organization Name

International Business Machines Corporation

Inventor(s)

Brent A. Anderson of Jericho VT (US)

Albert M. Chu of Nashua NH (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

Nicholas Anthony Lanzillo of Wynantskill NY (US)

Ruilong Xie of Niskayuna NY (US)

VTFET CIRCUIT WITH OPTIMIZED MOL - A simplified explanation of the abstract

This abstract first appeared for US patent application 18086229 titled 'VTFET CIRCUIT WITH OPTIMIZED MOL

Simplified Explanation

This patent application discusses the use of VTFET logic devices in integrated circuits and related logic structures. It focuses on forming two-level MOL contact connector structures below the first metallization level wiring during processing, which allows for improved circuit design flexibility and scalability.

Key Features and Innovation

  • Formation of two-level MOL contact connector structures below the first metallization level wiring.
  • Use of damascene and subtractive metal etch techniques to create contact connector structures at two levels.
  • Improved wiring access for VTFET devices in logic circuits.
  • Enhanced circuit design flexibility and scalability, especially for multiplexor circuit layouts.

Potential Applications

The technology can be applied in the semiconductor industry for creating advanced integrated circuits with improved wiring capabilities and circuit design flexibility.

Problems Solved

  • Addressing connection issues at high wiring levels.
  • Enabling increased scaling of logic circuit designs.
  • Improving cell size reduction without creating significant connection issues.

Benefits

  • Enhanced circuit design flexibility.
  • Improved wiring capabilities.
  • Increased scalability of logic circuit designs.

Commercial Applications

Potential commercial applications include the semiconductor industry for developing advanced integrated circuits with improved wiring capabilities, especially for multiplexor circuit layouts.

Prior Art

Readers can explore prior art related to VTFET logic devices, MOL contact connector structures, and semiconductor circuit layouts to gain a deeper understanding of the technology.

Frequently Updated Research

Stay updated on the latest research in VTFET logic devices, MOL contact connector structures, and semiconductor circuit design for insights into advancements in the field.

Questions about VTFET Logic Devices

What are the key advantages of using VTFET logic devices in integrated circuits?

VTFET logic devices offer improved performance, lower power consumption, and enhanced scalability compared to traditional logic devices.

How do two-level MOL contact connector structures below the first metallization level wiring benefit circuit design flexibility?

These structures provide cross-connections to VTFET devices, enabling increased scaling of logic circuit designs and improved wiring access for multiplexor circuit layouts.


Original Abstract Submitted

Integrated circuits and related logic circuits and structures employing VTFET logic devices. In particular, during middle-of-line (MOL) processing, method steps are employed for forming two-level MOL contact connector structures below first (M1) metallization level wiring formed during subsequent BEOL processing. Using damascene and subtractive metal etch techniques, respective MOL contact connector structures at two levels are formed with a second level above a first level contact. These contact connector structures at two levels below M1 metallization level can provide cross-connections to VTFET devices of logic circuits that enable increased scaling of the logic circuit designs, e.g., especially for multiplexor circuit layouts due to wiring access. The flexible MOL cross-connections made below M1 metallization level provides for much improved M1 and M2 wirability and enable semiconductor circuit layouts that allow for improved cell size reduction without creating significant connection issues at high wiring levels thereby increasing circuit design flexibility.