18085768. CHEMICAL MECHANICAL POLISHING OF METAL GATE CUTS FORMED AFTER SOURCE AND DRAIN CONTACTS simplified abstract (Intel Corporation)

CHEMICAL MECHANICAL POLISHING OF METAL GATE CUTS FORMED AFTER SOURCE AND DRAIN CONTACTS

Organization Name

Intel Corporation

Inventor(s)

Matthew J. Prince of Portland OR (US)

Lawrence Zaino of Beaverton OR (US)

Barry B. Butler of Hillsboro OR (US)

Girish Sharma of Hillsboro OR (US)

Robert R. Mitchell of Portland OR (US)

Rajaram A. Pai of Lake Oswego OR (US)

Niels Sveum of Portland OR (US)

Alison V. Davis of Portland OR (US)

Chun Chen Kuo of Portland OR (US)

Reza Bayati of Portland OR (US)

Swapnadip Ghosh of Hillsboro OR (US)

CHEMICAL MECHANICAL POLISHING OF METAL GATE CUTS FORMED AFTER SOURCE AND DRAIN CONTACTS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18085768 titled 'CHEMICAL MECHANICAL POLISHING OF METAL GATE CUTS FORMED AFTER SOURCE AND DRAIN CONTACTS

Abstract: Techniques are provided herein to form semiconductor devices that include a gate cut formed after the formation of source or drain contacts and with a top surface that is substantially coplanar with a top surface of the source or drain contacts. An example semiconductor device includes a gate structure around or otherwise on a semiconductor region and a dielectric layer present on a top surface of the gate structure. Conductive contacts are formed over source and drain regions along a source/drain contact recess or trench. The gate structure may be interrupted with a gate cut that extends through an entire thickness of the gate structure and includes a dielectric material. A top surface of the gate cut may be polished until it is substantially coplanar with a top surface of the dielectric layer over the gate structure and a top surface of the source or drain contacts.

Key Features and Innovation:

• Formation of gate cut after source or drain contacts
• Top surface of gate cut coplanar with source or drain contacts
• Dielectric layer on top surface of gate structure
• Conductive contacts over source and drain regions
• Gate cut extends through entire thickness of gate structure

Potential Applications: - Semiconductor manufacturing - Integrated circuits - Electronics industry

Problems Solved: - Ensuring coplanarity of gate cut with source or drain contacts - Improving performance and reliability of semiconductor devices

Benefits: - Enhanced device performance - Improved manufacturing process - Increased reliability of semiconductor devices

Commercial Applications: Title: Advanced Semiconductor Device Manufacturing Process Description: This technology can be utilized in the production of high-performance semiconductor devices for various applications in the electronics industry, leading to improved efficiency and reliability in electronic systems.

Prior Art: Further research can be conducted in the field of semiconductor device manufacturing processes, particularly focusing on techniques for forming gate cuts and ensuring coplanarity with source or drain contacts.

Frequently Updated Research: Researchers are constantly exploring new methods and materials to enhance semiconductor device performance and reliability, which may include advancements in gate cut formation processes.

Questions about Semiconductor Device Manufacturing: 1. How does the formation of a gate cut impact the performance of semiconductor devices? 2. What are the key challenges in achieving coplanarity between the gate cut and source or drain contacts?

Original Abstract Submitted

Techniques are provided herein to form semiconductor devices that include a gate cut formed after the formation of source or drain contacts and with a top surface that is substantially coplanar with a top surface of the source or drain contacts. An example semiconductor device includes a gate structure around or otherwise on a semiconductor region and a dielectric layer present on a top surface of the gate structure. Conductive contacts are formed over source and drain regions along a source/drain contact recess or trench. The gate structure may be interrupted with a gate cut that extends through an entire thickness of the gate structure and includes a dielectric material. A top surface of the gate cut may be polished until it is substantially coplanar with a top surface of the dielectric layer over the gate structure and a top surface of the source or drain contacts.