18085717. NONVOLATILE MEMORY DEVICE simplified abstract (Samsung Electronics Co., Ltd.)

NONVOLATILE MEMORY DEVICE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

DONGHA Shin of HWASEONG-SI (KR)

YOHAN Lee of INCHEON (KR)

NONVOLATILE MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18085717 titled 'NONVOLATILE MEMORY DEVICE

Simplified Explanation

The patent application describes a nonvolatile memory device that includes a memory cell area and a peripheral circuit area.

• The memory cell area consists of a common source plate, at least one cell structure, and a first metal pad.
• The peripheral circuit area includes a middle area, a first edge area, and a second metal pad.
• A first contact connects the common source plate to the first metal pad in the memory cell area.
• A second contact connects a common source line switch to the second metal pad in the peripheral circuit area.
• The first metal pad and the second metal pad are in contact with each other.

Potential applications of this technology:

• Nonvolatile memory devices can be used in various electronic devices such as smartphones, tablets, and computers.
• The technology can be applied in data storage systems, allowing for faster and more efficient data access and retrieval.

Problems solved by this technology:

• The nonvolatile memory device provides a reliable and efficient way to store and retrieve data.
• The connection between the memory cell area and the peripheral circuit area ensures proper functioning of the device.

Benefits of this technology:

• The nonvolatile memory device offers improved performance and reliability compared to traditional memory devices.
• The connection between the memory cell area and the peripheral circuit area enhances the overall efficiency of the device.

Original Abstract Submitted

A nonvolatile memory device includes; a memory cell area including a common source plate, at least one cell structure under the common source plate, and a first metal pad under the at least one cell structure, and a peripheral circuit area on which the memory cell area is mounted, including a middle area , a first edge area, and a second metal pad on the first edge area. The memory cell area further includes a first contact extending from the common source plate and connected to the first metal pad. The peripheral circuit area further includes a second contact extending from a common source line switch and connected to the second metal pad. The first metal pad contacts with the second metal pad on the second metal pad.