18069970. EXTENDED SOURCE/DRAIN CONTACT FOR SHIFTED DRAIN VOLTAGE FOR A BACKSIDE POWER DISTRIBUTION NETWORK simplified abstract (International Business Machines Corporation)

EXTENDED SOURCE/DRAIN CONTACT FOR SHIFTED DRAIN VOLTAGE FOR A BACKSIDE POWER DISTRIBUTION NETWORK

Organization Name

International Business Machines Corporation

Inventor(s)

Tsung-Sheng Kang of Ballston Lake NY (US)

Tao Li of Slingerlands NY (US)

Ruilong Xie of Niskayuna NY (US)

Chih-Chao Yang of Glenmont NY (US)

EXTENDED SOURCE/DRAIN CONTACT FOR SHIFTED DRAIN VOLTAGE FOR A BACKSIDE POWER DISTRIBUTION NETWORK - A simplified explanation of the abstract

This abstract first appeared for US patent application 18069970 titled 'EXTENDED SOURCE/DRAIN CONTACT FOR SHIFTED DRAIN VOLTAGE FOR A BACKSIDE POWER DISTRIBUTION NETWORK

The semiconductor device described in the patent application features a direct backside contact between a source line and a source epitaxial growth, as well as a drain line and a drain epitaxial growth. Additionally, a clock signal line contact via connects a gate to a backside clock signal line, which is surrounded by a deep STI fill to prevent shorting between the clock signal line and the source and/or drain lines in the backside power rail.

• Direct backside contact between source line and source epitaxial growth
• Direct backside contact between drain line and drain epitaxial growth
• Clock signal line contact via connecting gate to backside clock signal line
• Deep STI fill surrounding clock signal line contact via to prevent shorting
• Preventing shorting between clock signal line and source/drain lines in backside power rail

Potential Applications

The technology described in the patent application could be applied in the development of advanced semiconductor devices for various electronic applications, including integrated circuits, microprocessors, and memory devices.

Problems Solved

This technology addresses the issue of shorting between different components in a semiconductor device, specifically preventing shorting between the clock signal line and the source and/or drain lines in the backside power rail.

Benefits

The benefits of this technology include improved reliability and performance of semiconductor devices, reduced risk of short circuits, and enhanced overall functionality of electronic systems utilizing these devices.

Commercial Applications

The technology could have significant commercial applications in the semiconductor industry, particularly in the production of high-performance electronic devices for consumer electronics, telecommunications, and computing applications.

Questions about Semiconductor Device Technology

How does the direct backside contact between source and drain lines improve the performance of the semiconductor device?

The direct backside contact ensures efficient electrical connections, reducing resistance and improving overall device performance.

What are the potential challenges in implementing the clock signal line contact via surrounded by a deep STI fill?

One potential challenge could be ensuring proper insulation and preventing leakage currents between the clock signal line and surrounding components.

Original Abstract Submitted

A semiconductor device includes at least a direct backside contact between a source line and a source epitaxial growth and/or a drain line and a drain epitaxial growth. A clock signal line contact via can connect a gate to a backside clock signal line. The clock signal line contact via is surrounded by a deep STI fill to prevent shorting between the clock signal line and the source and/or drain lines in the backside power rail.