18069077. VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED BACKSIDE TRENCH EPITAXY simplified abstract (International Business Machines Corporation)

VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED BACKSIDE TRENCH EPITAXY

Organization Name

International Business Machines Corporation

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Brent A. Anderson of Jericho VT (US)

Shogo Mochizuki of Mechanicville NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

Albert M. Chu of Nashua NH (US)

Nicholas Anthony Lanzillo of Wynantskill NY (US)

VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED BACKSIDE TRENCH EPITAXY - A simplified explanation of the abstract

This abstract first appeared for US patent application 18069077 titled 'VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED BACKSIDE TRENCH EPITAXY

The semiconductor structure with self-aligned backside trench epitaxy involves a field effect transistor with a channel fin extending vertically from a bottom source/drain region.

• The bottom source/drain region contains a trench epitaxy layer located underneath the bottommost surface of the channel fin.
• A high-k metal gate stack is present along the sidewalls of the channel fin, separated from the bottom source/drain region by a bottom spacer.
• A top source/drain region is situated above the topmost surface of the channel fin, separated from the high-k metal gate by a top spacer.
• The structure includes a backside metal contact within a backside interlayer dielectric, electrically connected to the bottom source/drain region.

Potential Applications: - Advanced field effect transistors in semiconductor devices - High-performance integrated circuits in electronics

Problems Solved: - Enhanced performance and functionality of field effect transistors - Improved electrical connectivity and alignment in semiconductor structures

Benefits: - Increased efficiency and speed of electronic devices - Enhanced reliability and durability of semiconductor components

Commercial Applications: Title: Advanced Semiconductor Structures for High-Performance Electronics This technology can be utilized in the development of cutting-edge electronic devices, such as smartphones, computers, and IoT devices, to improve their performance and functionality.

Questions about the technology: 1. How does the self-aligned backside trench epitaxy improve the performance of field effect transistors? 2. What are the key advantages of using a high-k metal gate stack in semiconductor structures?

Original Abstract Submitted

A semiconductor structure with self-aligned backside trench epitaxy includes a channel fin extending vertically from a bottom source/drain region of a field effect transistor. The bottom source/drain region includes a trench epitaxy later located underneath a bottommost surface of the channel fin. A high-k metal gate stack is disposed along sidewalls of the channel fin. The high-k metal gate is separated from the bottom source/drain region by a bottom spacer. A top source/drain region is located above a topmost surface of the channel fin. The top source/drain region is separated from the high-k metal gate by a top spacer. The semiconductor structure further includes a backside metal contact within a backside interlayer dielectric. The backside metal contact is electrically connected to, and vertically aligned with, the bottom source/drain region.