18065860. STACKED CMOS DEVICES WITH TWO DIELECTRIC MATERIALS IN A GATE CUT simplified abstract (International Business Machines Corporation)

STACKED CMOS DEVICES WITH TWO DIELECTRIC MATERIALS IN A GATE CUT

Organization Name

International Business Machines Corporation

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Kangguo Cheng of Schenectady NY (US)

Julien Frougier of Albany NY (US)

Chanro Park of Clifton Park NY (US)

Min Gyu Sung of Latham NY (US)

STACKED CMOS DEVICES WITH TWO DIELECTRIC MATERIALS IN A GATE CUT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18065860 titled 'STACKED CMOS DEVICES WITH TWO DIELECTRIC MATERIALS IN A GATE CUT

Simplified Explanation: A complementary field effect transistor (CFET) device is created on a semiconductor substrate with two transistors, one under the other. The device includes a gate cut filled with two different dielectric materials that apply stress to the transistors to enhance their electrical performance.

• The CFET device consists of two transistors, one on top of the other.
• A gate cut filled with two dielectric materials is placed next to the gate of the CFET device.
• The dielectric materials in the gate cut are selected to improve the performance of the NFET and PFET transistors in the CFET device.
• The first dielectric material applies compressive stress to the PFET transistor, enhancing its performance.
• The second dielectric material applies tensile stress to the NFET transistor, improving its performance.

Key Features and Innovation:

• CFET device with two transistors stacked on top of each other.
• Gate cut filled with two dielectric materials to enhance transistor performance.
• Compressive stress applied to PFET transistor for improved performance.
• Tensile stress applied to NFET transistor for enhanced performance.

Potential Applications:

• Semiconductor industry for improved transistor performance.
• Electronics manufacturing for enhanced device efficiency.
• Research and development for advanced transistor technology.

Problems Solved:

• Enhances electrical performance of transistors in CFET devices.
• Improves efficiency and reliability of semiconductor devices.
• Addresses the need for stress application to optimize transistor performance.

Benefits:

• Enhanced electrical performance of transistors.
• Improved efficiency and reliability of semiconductor devices.
• Advanced technology for better transistor optimization.

Commercial Applications:

• Title: "Enhanced Transistor Performance in Semiconductor Devices"
• Potential commercial uses in the semiconductor industry.
• Market implications include improved efficiency and reliability of electronic devices.

Prior Art: Further research can be conducted on stress application in transistors to enhance performance.

Frequently Updated Research: Ongoing studies on stress application in transistors for improved electrical performance.

Questions about CFET Technology: 1. How does the stress application in the CFET device improve transistor performance? 2. What are the potential long-term implications of using CFET technology in semiconductor devices?

Original Abstract Submitted

A complementary field effect transistor (CFET) device is formed on a semiconductor substrate. The CFET device has a first transistor that is under a second transistor. A filled gate cut is directly adjacent to the sidewall of the gate of the CFET device. The first dielectric material in the gate cut is adjacent to the first transistor. The second dielectric material in the gate cut is adjacent to the second transistor. The two dielectric materials in the gate cut are selected to improve the electrical performance of each of the NFET and the PFET in the CFET device. The first dielectric material can apply a compressive stress to the channels of the first transistor when the first transistor is a PFET to improve the electrical performance of the PFET. When the second transistor is an NFET, the second dielectric material applies a tensile stress to NFET to improve NFET performance.