18061733. DRAM TRANSISTOR INCLUDING HORIZONAL BODY CONTACT simplified abstract (Applied Materials, Inc.)

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DRAM TRANSISTOR INCLUDING HORIZONAL BODY CONTACT

Organization Name

Applied Materials, Inc.

Inventor(s)

Sipeng Gu of Clifton Park NY (US)

Qintao Zhang of Mt Kisco NY (US)

DRAM TRANSISTOR INCLUDING HORIZONAL BODY CONTACT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18061733 titled 'DRAM TRANSISTOR INCLUDING HORIZONAL BODY CONTACT

The patent application describes a method for forming a dynamic random-access memory (DRAM) device with pillars, spacer layers, body contacts, caps, gates, and source/drains.

  • The DRAM device includes pillars extending from a base layer, with spacer layers formed along the lower portion of each pillar.
  • A body contact and a cap are positioned between the pillars, with the body contact formed over the spacer layer.
  • A gate is formed around the pillars, and bottom source/drains are in the base layer while top source/drains are in each pillar, extending above the gate.

Potential Applications:

  • This technology can be applied in the manufacturing of DRAM devices for use in various electronic devices such as computers, smartphones, and tablets.

Problems Solved:

  • The technology addresses the need for efficient and compact DRAM devices with improved performance and reliability.

Benefits:

  • The DRAM device structure allows for increased memory density, faster data access speeds, and reduced power consumption.

Commercial Applications:

  • The technology has significant commercial potential in the semiconductor industry for producing advanced DRAM devices that meet the growing demand for high-performance memory solutions.

Prior Art:

  • Researchers can explore prior art related to DRAM device structures, semiconductor manufacturing processes, and memory storage technologies to understand the evolution of similar innovations.

Frequently Updated Research:

  • Researchers are continually exploring new materials, fabrication techniques, and design optimizations to enhance the performance and efficiency of DRAM devices.

Questions about DRAM technology: 1. How does the structure of the DRAM device described in the patent application contribute to its performance and reliability? 2. What are the key differences between traditional DRAM devices and the innovative design proposed in the patent application?


Original Abstract Submitted

Disclosed herein are approaches for forming a dynamic random-access memory device (DRAM). One DRAM device may include plurality of pillars extending from a base layer, and a spacer layer formed along just a lower portion of each of the plurality of pillars. The DRAM further includes a body contact and a cap between the plurality of pillars, wherein the body contact is formed over the spacer layer, and a gate formed around the plurality of pillars. The DRAM further includes a bottom source/drain formed in the base layer and a top source/drain formed in each pillar of the plurality of pillars, wherein the top source/drain extends above the gate.

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