18059923. PHOTONIC INTEGRATED CIRCUIT (PIC) FIRST PATCH ARCHITECTURE simplified abstract (Intel Corporation)

PHOTONIC INTEGRATED CIRCUIT (PIC) FIRST PATCH ARCHITECTURE

Organization Name

Intel Corporation

Inventor(s)

Jeremy D. Ecton of Gilbert AZ (US)

Srinivas V. Pietambaram of Chandler AZ (US)

Brandon Christian Marin of Gilbert AZ (US)

Gang Duan of Chandler AZ (US)

Bai Nie of Chandler AZ (US)

PHOTONIC INTEGRATED CIRCUIT (PIC) FIRST PATCH ARCHITECTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18059923 titled 'PHOTONIC INTEGRATED CIRCUIT (PIC) FIRST PATCH ARCHITECTURE

Simplified Explanation

The abstract describes a patent application for a PIC first patch architecture that includes a solderless electrical connection at a die interconnect surface. Redistribution layers (RDLs) are patterned onto the face of an IC die and PIC die before being placed into a cavity in a glass layer. Optical interconnections for the PIC die are protected during RDL patterning, and optical waveguides may be patterned into the glass layer before or after assembling the PIC first patch including the RDL and glass layer.

• Solderless electrical connection at a die interconnect surface
• Redistribution layers (RDLs) patterned onto IC and PIC dies before placement in a glass layer cavity
• Protection of optical interconnections during RDL patterning
• Optical waveguides may be patterned into the glass layer before or after assembling the PIC first patch

Potential Applications

The technology could be applied in the development of high-speed and high-performance integrated circuits and photonic integrated circuits for various applications such as telecommunications, data centers, and optical networking.

Problems Solved

The technology solves the problem of achieving reliable electrical connections and protecting optical interconnections during the manufacturing process of integrated circuits and photonic integrated circuits.

Benefits

The benefits of this technology include improved reliability of electrical connections, enhanced protection of optical interconnections, and the potential for higher performance and efficiency in integrated circuit and photonic integrated circuit applications.

Potential Commercial Applications

Potential commercial applications of this technology include the production of advanced electronic devices, telecommunications equipment, data center infrastructure, and optical networking components.

Possible Prior Art

One possible prior art could be the use of soldered electrical connections in traditional integrated circuit manufacturing processes.

How does this technology compare to existing methods of connecting IC and PIC dies?

This article does not provide a direct comparison to existing methods of connecting IC and PIC dies. It would be helpful to understand the advantages and disadvantages of this technology compared to traditional soldered connections or other alternative methods.

What are the specific challenges in patterning optical waveguides into the glass layer?

The article briefly mentions that optical waveguides may be patterned into the glass layer, but it does not delve into the specific challenges or considerations involved in this process. Understanding the intricacies of patterning optical waveguides could provide valuable insights into the feasibility and effectiveness of this technology.

Original Abstract Submitted

A PIC first patch architecture includes a solderless electrical connection at a die interconnect surface. Redistribution layers (RDLs) are patterned onto a face of an integrated circuit (IC) die and photonic integrated circuit (PIC) die prior to placement of the RDLs into a cavity in a glass layer. Optical interconnections for the PIC die are protected during RDL patterning and optical waveguides may be patterned into the glass layer fore or after assembling the PIC first patch including the RDL and glass layer.