18059398. SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THEREOF simplified abstract (NANYA TECHNOLOGY CORPORATION)
Contents
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THEREOF
Organization Name
Inventor(s)
Ming Hsun Wu of New Taipei City (TW)
Hsueh-Han Lu of New Taipei City (TW)
Yao Ching Chiu of Chiayi County (TW)
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18059398 titled 'SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THEREOF
Simplified Explanation
The method described in the patent application involves the formation of semiconductor structures by overlapping conductors, vias, and electrodes in different dielectric layers on a substrate. Here are the key points of the innovation:
- Formation of conductors in a first dielectric layer on a substrate.
- Creation of first conductive vias overlapping the conductors in a second dielectric layer.
- Formation of electrodes in a third dielectric layer, with each electrode overlapping a first conductive via.
- Deposition of a hard mask on the third dielectric layer.
- Creation of mandrel exposures on the hard mask.
- Patterning spacers on the sidewalls of the mandrel exposures.
- Removal of the mandrel exposures.
- Patterning of the hard mask and the third dielectric layer based on the spacers to form conductive lines along a specific direction.
Potential Applications: - This technology can be applied in the manufacturing of advanced semiconductor devices with high-density interconnects.
Problems Solved: - The method allows for the precise formation of conductive lines and vias in semiconductor structures, improving the overall performance and reliability of the devices.
Benefits: - Enhanced integration density and improved signal transmission capabilities in semiconductor devices. - Increased efficiency and reliability of electronic circuits.
Potential Commercial Applications: - This technology can be utilized in the production of microprocessors, memory chips, and other semiconductor components for various electronic devices.
Possible Prior Art: - Prior methods of forming semiconductor structures may not have included the specific combination of steps described in this patent application.
Unanswered Questions: 1. How does the patterning of spacers on the sidewalls of mandrel exposures contribute to the formation of precise conductive lines? 2. What are the specific materials used in each dielectric layer and how do they impact the performance of the semiconductor structure?
Original Abstract Submitted
A method of forming a semiconductor structure includes a number of operations. Conductors are formed in a first dielectric layer on a substrate. First conductive vias overlapping the conductors are formed in a second dielectric layer on the substrate. Electrodes are formed in a third dielectric layer on the substrate, wherein each of the electrodes overlaps one of the first conductive vias. A hard mask is formed on the third dielectric layer. Mandrel exposures are formed on the hard mask. Patterning spacers is formed on sidewalls of the mandrel exposures. The mandrel exposures are removed. The hard mask is patterned based on the patterning spacers and the third dielectric layer is patterned based on the patterning spacers to form conductive lines along the second direction in the third dielectric layer, wherein each of the conductive lines overlaps one of the first conductive vias.
