18048606. MEMORY DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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MEMORY DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Chajea Jo of Yongin-si (KR)

Inhyo Hwang of Asan-si (KR)

MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18048606 titled 'MEMORY DEVICE

Simplified Explanation

The abstract describes a memory device that consists of two stacked structures. The first structure includes a substrate, circuitry, an auxiliary memory cell array, an insulating layer, and bonding pads. The second structure includes a substrate, a main memory cell array, an insulating layer, and bonding pads. The bonding pads of the first structure are in contact with the bonding pads of the second structure.

  • The memory device consists of two stacked structures.
  • The first structure includes a substrate, circuitry, an auxiliary memory cell array, an insulating layer, and bonding pads.
  • The second structure includes a substrate, a main memory cell array, an insulating layer, and bonding pads.
  • The bonding pads of the first structure are in contact with the bonding pads of the second structure.

Potential Applications

  • This memory device can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be utilized in data storage systems, allowing for increased memory capacity and improved performance.

Problems Solved

  • The memory device solves the problem of limited memory capacity in electronic devices by providing a stacked structure.
  • It addresses the need for improved performance and efficiency in data storage systems.

Benefits

  • The stacked structure of the memory device allows for increased memory capacity without increasing the device's footprint.
  • It provides improved performance and efficiency in data storage systems.
  • The memory device offers a compact and space-saving solution for electronic devices.


Original Abstract Submitted

A memory device is provided. The memory device includes a first structure and a second structure stacked on the first structure in a vertical direction. The first structure includes a first substrate, peripheral circuitry, an auxiliary memory cell array, a first insulating layer, and a plurality of first bonding pads. The second structure includes a second substrate, a main memory cell array, a second insulating layer, and a plurality of second bonding pads. The plurality of first bonding pads are in contact with the plurality of second bonding pads, respectively.