18044725. SHIFT REGISTER AND DRIVING METHOD THEREOF, SCAN DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY APPARATUS simplified abstract (BOE Technology Group Co., Ltd.)
SHIFT REGISTER AND DRIVING METHOD THEREOF, SCAN DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY APPARATUS
Organization Name
BOE Technology Group Co., Ltd.
Inventor(s)
SHIFT REGISTER AND DRIVING METHOD THEREOF, SCAN DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY APPARATUS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18044725 titled 'SHIFT REGISTER AND DRIVING METHOD THEREOF, SCAN DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY APPARATUS
The abstract describes a patent application for a shift register, which includes various circuits for signal transmission and control.
- Input circuit transmits input signal to a node.
- First output circuit transmits output signal to a scan signal terminal.
- First control circuit transmits a third output signal to a node.
- Second control circuit controls potentials at two nodes to be inverted.
- Second output circuit transmits output signal to the scan signal terminal.
Potential Applications: - Data storage systems - Serial data transmission - Integrated circuits
Problems Solved: - Efficient signal transmission - Controlled potential at nodes
Benefits: - Improved data processing speed - Enhanced signal integrity - Reduced power consumption
Commercial Applications: Title: "Advanced Shift Register Technology for High-Speed Data Processing" This technology can be used in: - Semiconductor industry - Communication systems - Consumer electronics market
Prior Art: Research on shift registers and signal transmission circuits in integrated circuits.
Frequently Updated Research: Ongoing studies on optimizing shift register performance in data processing applications.
Questions about Shift Registers: 1. How do shift registers improve data processing efficiency? 2. What are the key components of a shift register circuit and how do they work together?
Original Abstract Submitted
A shift register includes an input circuit, a first output circuit, a first control circuit, a second control circuit and a second output circuit. The input circuit is configured to transmit an input signal provided by an input signal terminal to a first node. The first output circuit is configured to transmit a first output signal provided by a first output signal terminal to a scan signal terminal. The first control circuit is configured to transmit a third output signal provided by a third output signal terminal to a second node. The second control circuit is configured to control a potential at the first node and a potential at the second node to be two inverted potentials. The second output circuit is configured to transmit a second output signal provided by a second output signal terminal to the scan signal terminal.
