17969856. ERROR CORRECTION simplified abstract (Micron Technology, Inc.)
Contents
ERROR CORRECTION
Organization Name
Inventor(s)
Marco Sforzin of Cernusco Sul Naviglio (IT)
ERROR CORRECTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17969856 titled 'ERROR CORRECTION
Simplified Explanation
The patent application describes a method, system, and devices for mapping pairs of bits from a memory transfer block (MTB) to linked die input/output (LDIO) lines. These LDIO lines connect a linked (LK) die to an interface (IF) die. In the event of a failure in one of the LDIO lines, a Bose-Chaudhuri-Hocquenghem (BCH) error correction is performed on the pairs of bits mapped to the failed LDIO line. Each pair of bits represents a symbol for the BCH error correction.
- The patent application focuses on mapping pairs of bits from a memory transfer block (MTB) to linked die input/output (LDIO) lines.
- These LDIO lines connect a linked (LK) die to an interface (IF) die.
- In case of a failure in one of the LDIO lines, a Bose-Chaudhuri-Hocquenghem (BCH) error correction is performed on the pairs of bits mapped to the failed LDIO line.
- Each pair of bits represents a symbol for the BCH error correction.
Potential Applications
This technology has potential applications in various fields, including:
- Semiconductor industry
- Memory systems
- Data storage devices
- Communication systems
Problems Solved
The patent application addresses the following problems:
- Failure of LDIO lines in the communication between linked die and interface die
- Ensuring reliable data transfer between the linked die and interface die
- Correcting errors in the transferred data caused by LDIO line failures
Benefits
The technology described in the patent application offers several benefits, such as:
- Improved reliability of data transfer
- Efficient error correction using Bose-Chaudhuri-Hocquenghem (BCH) codes
- Enhanced performance and functionality of memory systems and communication devices
- Increased data integrity and accuracy
Original Abstract Submitted
Methods, systems, and devices related to mapping a plurality of pairs of bits of a memory transfer block (MTB) to a plurality of linked (LK) die input/output (LDIO) lines coupling a LK die to an interface (IF) die. The plurality of pairs of bits of the MTB can be communicated from the LK die to the IF die via the plurality of LDIO lines. Responsive to a failure of one of the plurality of LDIO lines, a Bose-Chaudhuri-Hocquenghem (BCH) error correction can be performed on the pairs of bits mapped to the failed LDIO line. Each of the plurality of pairs of bits is a respective symbol for the BCH error correction.
