17944691. MEMORY REPAIR SYSTEM AND METHOD simplified abstract (QUALCOMM Incorporated)
Contents
MEMORY REPAIR SYSTEM AND METHOD
Organization Name
Inventor(s)
Amir Borovietzky of San Diego CA (US)
Arvind Jain of San Diego CA (US)
Massine Bitam of San Diego CA (US)
Madan Krishnappa of San Diego CA (US)
MEMORY REPAIR SYSTEM AND METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 17944691 titled 'MEMORY REPAIR SYSTEM AND METHOD
Simplified Explanation
The patent application describes a system for repairing random access memory, including serial test interface logic, fuse-sense logic, a repair data register chain, and multiplexing logic.
- The repair data register chain consists of interconnected data registers that shift data through the chain.
- Each data register has a data output connected to a repair information input of the random access memory.
- The multiplexing logic offers a soft-repair mode and a hard-repair mode.
- In the soft-repair mode, the logic receives soft-repair data from the serial test interface logic into the data registers.
- In the hard-repair mode, the logic receives data from the fuse-sense logic into the data registers.
Potential Applications
- Semiconductor manufacturing
- Computer hardware maintenance
- Embedded systems
Problems Solved
- Efficient repair of random access memory
- Reduction of downtime for memory repair
- Enhanced memory reliability
Benefits
- Increased memory lifespan
- Cost-effective memory repair solutions
- Improved system performance
Original Abstract Submitted
A system for repairing a random access memory may include serial test interface logic, fuse-sense logic, a repair data register chain, and multiplexing logic. The repair data register chain may include serially interconnected data registers configured to shift data through the repair data register chain. Each data register of the repair data register chain may have a data output configured to be coupled to a repair information input of the random access memory. The multiplexing logic may be configured to provide a soft-repair mode and a hard-repair mode. When the soft-repair mode is selected, the multiplexing logic may be configured to receive soft-repair data provided by the serial test interface logic into the data registers. When the hard-repair mode is selected, the multiplexing logic may be configured to receive the data provided by the fuse-sense logic into the data registers.
