17941592. VIRTUAL AND PHYSICAL EXTENDED MEMORY ARRAY simplified abstract (Micron Technology, Inc.)

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VIRTUAL AND PHYSICAL EXTENDED MEMORY ARRAY

Organization Name

Micron Technology, Inc.

Inventor(s)

Donald M. Morgan of Meridian ID (US)

Alan J. Wilson of Boise ID (US)

Bryan David Kerstetter of Kuna ID (US)

VIRTUAL AND PHYSICAL EXTENDED MEMORY ARRAY - A simplified explanation of the abstract

This abstract first appeared for US patent application 17941592 titled 'VIRTUAL AND PHYSICAL EXTENDED MEMORY ARRAY

Simplified Explanation

The memory device described in the patent application extends addressable array space by incorporating virtual and physical memory arrays. Here are some key points to explain the innovation:

  • Incorporates virtual and physical memory arrays to extend storage space.
  • Uses an extra row address bit to increase addressable space.
  • Spare or redundant physical memory elements can be programmed to a virtual address space.
  • Activates virtual row in the virtual array space for memory device operation.

Potential Applications

The technology described in the patent application could be applied in:

  • Data storage systems
  • Embedded systems
  • Memory repair mechanisms

Problems Solved

This technology addresses the following issues:

  • Limited physical memory array space
  • Efficient memory repair and management
  • Addressable space expansion

Benefits

The benefits of this technology include:

  • Increased storage capacity
  • Enhanced memory repair capabilities
  • Improved memory management efficiency

Potential Commercial Applications

Optimized for SEO: Memory Device Innovation for Extended Storage Space This technology could be used in various commercial applications such as:

  • Computer hardware manufacturing
  • Data centers
  • Consumer electronics industry

Unanswered Questions

How does the technology impact power consumption in memory devices?

The patent application does not provide information on the power consumption implications of this technology.

Are there any limitations to the scalability of this memory device innovation?

The patent application does not address potential scalability limitations of the technology.


Original Abstract Submitted

A memory device for extending addressable array space by incorporating virtual and physical memory arrays is disclosed. When extra storage space beyond a physical memory array is needed by a controller of the memory device, the storage space may be provided by extending the address space using a virtual array. The memory device incorporates the use of an extra row address bit to increase the addressable space, whereby the extra bit is utilized to address virtual rows in the virtual array. Spare or redundant physical memory elements utilized for memory repair may be programmed to a virtual address space for the virtual memory array. When a memory device operation is activated, the extra row address bit is set to high, and the virtual row address matches with a spare or redundant memory element, the virtual row in the virtual array space is activated for performance of the operation.