17937924. GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELATED APPARATUSES, METHODS, AND COMPUTING SYSTEMS simplified abstract (Micron Technology, Inc.)
Contents
- 1 GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELATED APPARATUSES, METHODS, AND COMPUTING SYSTEMS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELATED APPARATUSES, METHODS, AND COMPUTING SYSTEMS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELATED APPARATUSES, METHODS, AND COMPUTING SYSTEMS
Organization Name
Inventor(s)
Christopher G. Wieduwilt of Boise ID (US)
Fatma Arzum Simsek-ege of Boise ID (US)
GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELATED APPARATUSES, METHODS, AND COMPUTING SYSTEMS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17937924 titled 'GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELATED APPARATUSES, METHODS, AND COMPUTING SYSTEMS
Simplified Explanation
The abstract describes a patent application for a global column repair system with local column decoder circuitry for memory arrays. The system includes column address drivers, match circuitry, and data storage elements to identify and disable defective column planes.
- Global column repair system with local column decoder circuitry for memory arrays
- Column address drivers correspond to column planes and drive column address signals to local decoder circuitry
- Match circuitry compares received column address to defective column addresses and disables drivers for defective planes
- Data storage elements store defective column addresses for reference
Potential Applications
This technology can be applied in various memory systems, such as DRAM, SRAM, and flash memory, to improve memory reliability and performance.
Problems Solved
- Identifying and repairing defective column planes in memory arrays - Enhancing memory array functionality by disabling faulty components - Improving overall memory system reliability and longevity
Benefits
- Increased memory array reliability and performance - Efficient identification and repair of defective components - Extended lifespan of memory systems
Potential Commercial Applications
"Global Column Repair System with Local Column Decoder Circuitry for Memory Arrays" can be utilized in the manufacturing of memory modules for consumer electronics, data centers, and other computing devices.
Possible Prior Art
One possible prior art could be the use of global repair circuits in memory systems to address defects, but the integration of local column decoder circuitry for more precise repair actions may be a novel aspect of this patent application.
Unanswered Questions
How does this technology impact memory array manufacturing processes?
This article does not delve into the specific implications of implementing this technology on the production line, such as potential cost savings or efficiency improvements.
What are the potential limitations or challenges of integrating this system into existing memory arrays?
The article does not address any obstacles or constraints that may arise when incorporating this global column repair system with local column decoder circuitry into current memory array designs.
Original Abstract Submitted
Global column repair with local column decoder circuitry and related apparatuses, methods, and computing systems are disclosed. An apparatus includes global column repair circuitry including column address drivers corresponding to respective ones of column planes of a memory array. The column address drivers are configured to, if enabled, drive a received column address signal to local column decoder circuitry local to respective ones of the column planes. The global column repair circuitry also includes match circuitry and data storage elements configured to store defective column addresses corresponding to defective column planes. The match circuitry is configured to compare a received column address indicated by the received column address signal to the defective column addresses and disable a column address driver corresponding to a defective column plane responsive to a determination that the received column address matches a defective column address associated with the defective column plane.
