17937495. Hardware Based Ethernet Audio And Video Bridging (EAVB) Packet Scheduling simplified abstract (QUALCOMM Incorporated)

Hardware Based Ethernet Audio And Video Bridging (EAVB) Packet Scheduling

Organization Name

QUALCOMM Incorporated

Inventor(s)

Narasimha Rao Koramutla of San Diego CA (US)

Arun Gothekar of Hyderabad (IN)

Susheel Kumar Yadav Yadagiri of San Diego CA (US)

Akshat Gupta of New Delhi (IN)

Srinivas Marakala of San Diego CA (US)

Naveen Kumar Narala of Bengaluru (IN)

Radvajesh Munibyraiah of Bangalore (IN)

Hardware Based Ethernet Audio And Video Bridging (EAVB) Packet Scheduling - A simplified explanation of the abstract

This abstract first appeared for US patent application 17937495 titled 'Hardware Based Ethernet Audio And Video Bridging (EAVB) Packet Scheduling

Simplified Explanation

The abstract describes an automobile network device with a descriptor sorting engine that utilizes a DMA controller, memory organized by channel clusters with FIFO memories, a timer, and TS sorting logic to sort timestamp-pointer pairs from packet descriptors and store them in a sorted descriptor ring memory.

• The automobile network device includes a descriptor sorting engine (DSE) with a DMA controller, memory organized by channel clusters with FIFO memories, a timer, and TS sorting logic.
• The DMA controller pulls timestamp-pointer pairs from unsorted descriptor ring memory, stores them in FIFO memories, triggers TS sorting logic to reorder the pairs in ascending order, reads packet descriptors using the sorted pairs, and stores the descriptors in a sorted descriptor ring memory.

Potential Applications

The technology could be applied in automotive systems for efficient data processing and communication within the vehicle network.

Problems Solved

1. Efficient sorting and processing of timestamp-pointer pairs from packet descriptors. 2. Streamlining data flow within the automobile network for improved performance.

Benefits

1. Faster data processing and communication. 2. Enhanced network efficiency and reliability.

Potential Commercial Applications

"Automobile Network Device with Descriptor Sorting Engine: Commercial Applications"

Possible Prior Art

There may be prior art related to DMA controllers and memory organization in network devices, but specific examples are not provided in the abstract.

Unanswered Questions

How does the DSE handle errors or exceptions during the sorting process?

The abstract does not mention how the DSE manages errors or exceptions that may occur during the sorting process.

What is the impact of the TS sorting logic on overall system performance?

The abstract does not discuss the potential impact of the TS sorting logic on the performance of the automobile network device.

Original Abstract Submitted

Various embodiments include an automobile network device that includes a descriptor sorting engine (DSE). The DSE may include a direct memory access (DMA) controller, a memory organized by channel clusters that each include a plurality of first-in first-out (FIFO) memories, a timer, and a time stamp (TS) sorting logic component. The DMA controller may be configured to pull timestamp-pointer pairs from packet descriptors stored in an unsorted descriptor ring memory, store the timestamp-pointer pairs in the FIFO memories, trigger the TS sorting logic component to reorder the timestamp-pointer pairs in the FIFO memories so that they are sorted in ascending order, use the sorted timestamp-pointer pairs in the FIFO memories to read the packet descriptors stored in an unsorted descriptor ring memory, and store the packet descriptors in a sorted descriptor ring memory.