17933232. PROVIDING FAIRNESS-BASED ALLOCATION OF CACHES IN PROCESSOR-BASED DEVICES simplified abstract (QUALCOMM Incorporated)

From WikiPatents
Jump to navigation Jump to search

PROVIDING FAIRNESS-BASED ALLOCATION OF CACHES IN PROCESSOR-BASED DEVICES

Organization Name

QUALCOMM Incorporated

Inventor(s)

Suryanarayana Murthy Durbhakula of Hyderabad (IN)

PROVIDING FAIRNESS-BASED ALLOCATION OF CACHES IN PROCESSOR-BASED DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17933232 titled 'PROVIDING FAIRNESS-BASED ALLOCATION OF CACHES IN PROCESSOR-BASED DEVICES

Simplified Explanation

The abstract of the patent application describes a method for providing fairness-based allocation of caches in processor-based devices. The processor determines a fairness index for a client and allocates a portion of the cache based on this index.

  • The processor-based device includes a processor with a cache.
  • The processor calculates a fairness index for each client using the cache.
  • Based on the fairness index, the processor allocates a portion of the cache for the client's use.
  • Data corresponding to the client is written to a cache line based on the allocated portion of the cache.

Potential Applications

This technology could be applied in various processor-based devices where fair allocation of cache resources is important, such as servers, data centers, and networking equipment.

Problems Solved

This technology solves the problem of unfair cache allocation among multiple clients, ensuring that each client receives a fair share of cache resources based on their usage requirements.

Benefits

The benefits of this technology include improved performance and efficiency in processor-based devices by ensuring fair cache allocation, leading to better overall system performance.

Potential Commercial Applications

A potential commercial application of this technology could be in cloud computing environments, where multiple clients share resources and fair cache allocation is crucial for optimal performance.

Possible Prior Art

One possible prior art could be cache partitioning techniques used in multi-core processors to allocate cache resources among different cores efficiently.

What are the potential scalability limitations of this technology?

The scalability of this technology may be limited by the complexity of determining fairness indices for a large number of clients, which could impact the overall performance of the system.

How does this technology compare to existing cache allocation methods in terms of efficiency?

This technology improves efficiency by providing fair cache allocation based on individual client requirements, ensuring optimal resource utilization compared to traditional cache allocation methods.


Original Abstract Submitted

Providing fairness-based allocation of caches in processor-based devices is disclosed. In some aspects, a processor-based device comprises a processor that comprises a cache. The processor is configured to determine a fairness index for a client of a plurality of clients of the cache. The processor is further configured to allocate a portion of the cache for use by the client based on the fairness index. The processor is also configured to receive data to be written to the cache, wherein the data corresponds to the client. The processor is additionally configured to write the data to a cache line within the cache based on the portion of the cache allocated to the client.