17915824. ANTENNA ARRAY GROUPING simplified abstract (Telefonaktiebolaget LM Ericsson (publ))
Contents
ANTENNA ARRAY GROUPING
Organization Name
Telefonaktiebolaget LM Ericsson (publ)
Inventor(s)
Stefan Andersson of Flyinge (SE)
ANTENNA ARRAY GROUPING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17915824 titled 'ANTENNA ARRAY GROUPING
Simplified Explanation
The abstract describes a method and array of grouped antenna elements. The method involves arranging transmit and receive integrated circuits (ICs) on an IC chip and arranging multiple IC chips on a panel. The receive circuits on one IC chip are placed adjacent to the receive circuits on an adjacent IC chip.
- The method involves arranging transmit and receive integrated circuits (ICs) on an IC chip.
- Multiple IC chips are arranged on a panel.
- The receive circuits on one IC chip are placed adjacent to the receive circuits on an adjacent IC chip.
Potential Applications
This technology can be applied in various fields, including:
- Wireless communication systems
- Mobile devices
- Internet of Things (IoT) devices
- Radar systems
- Satellite communication systems
Problems Solved
The technology addresses the following problems:
- Efficient arrangement of antenna elements
- Improved signal transmission and reception
- Space optimization on IC chips and panels
- Enhanced performance of wireless communication systems
Benefits
The technology offers several benefits, such as:
- Increased antenna element density
- Improved signal quality and reliability
- Reduced interference and noise
- Enhanced overall performance of wireless communication systems
- Cost-effective implementation due to optimized use of resources
Original Abstract Submitted
A method and array of grouped antenna elements are provided. According to one aspect, a method includes arranging a row of transmit integrated circuits (IC), and a row of receive ICs on an IC chip, and arranging a plurality of IC chips on a panel so that a row of receive circuits on one IC chip is adjacent to a row of receive circuits on an adjacent IC chip.
