17897021. FORWARD LOOKING ALGORITHM FOR VERTICAL INTEGRATED CROSS-POINT ARRAY MEMORY simplified abstract (Micron Technology, Inc.)
FORWARD LOOKING ALGORITHM FOR VERTICAL INTEGRATED CROSS-POINT ARRAY MEMORY
Organization Name
Inventor(s)
Ferdinando Bedeschi of Biassono (MB) (IT)
FORWARD LOOKING ALGORITHM FOR VERTICAL INTEGRATED CROSS-POINT ARRAY MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 17897021 titled 'FORWARD LOOKING ALGORITHM FOR VERTICAL INTEGRATED CROSS-POINT ARRAY MEMORY
Simplified Explanation
- Systems and methods for reading memory cells involve applying different voltages to two sets of cells to determine their logic state. - A first ramping voltage is applied to the first set of cells, counting the number of logic 1 cells at each step. - The voltage at which the count reaches a threshold for the first time is recorded. - A second voltage lower than the first voltage is then applied to the second set of cells. - A second ramping voltage is applied to the second set of cells to read their logic state.
Potential Applications
- Memory cell reading in electronic devices - Data storage and retrieval systems
Problems Solved
- Efficient reading of memory cells - Accurate determination of logic states
Benefits
- Improved memory reading accuracy - Faster data retrieval - Energy efficiency in electronic devices
Original Abstract Submitted
Systems and methods for reading a first and second plurality of memory cells include applying a first ramping voltage with a first increment for each ramping step to read the first plurality of cells, counting, among the first plurality of cells at each ramping step, a first number of logic 1 cells, comparing the first number with a threshold at each ramping step of the first ramping voltage, determining a first voltage reached by the first ramping voltage, at the first voltage the first number becoming equal to or higher than the threshold for the first time, applying a second voltage lower than the first voltage to read the second plurality of cells, and applying a second ramping voltage ramping up from the second voltage with a second predetermined increment lower than the first predetermined increment for each ramping step to read the second plurality of cells.
