17896963. CASCODED SENSE AMPLIFIERS FOR SELF-SELECTING MEMORY simplified abstract (Micron Technology, Inc.)

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CASCODED SENSE AMPLIFIERS FOR SELF-SELECTING MEMORY

Organization Name

Micron Technology, Inc.

Inventor(s)

Umberto Di Vincenzo of Capriate San Gervasio (BG) (IT)

Ferdinando Bedeschi of Biassono (MB) (IT)

Michele Maria Venturini of Milan (MI) (IT)

Claudia Palattella of Cologno Monzese (MI) (IT)

CASCODED SENSE AMPLIFIERS FOR SELF-SELECTING MEMORY - A simplified explanation of the abstract

This abstract first appeared for US patent application 17896963 titled 'CASCODED SENSE AMPLIFIERS FOR SELF-SELECTING MEMORY

Simplified Explanation

The patent application describes systems and methods for operating a memory, including a sensing circuitry connected to a memory cell through an address decoder, a precharge circuitry, and a reference voltage provided to the precharge circuitry.

  • The sensing circuitry is connected to the memory cell through an address decoder.
  • The precharge circuitry is connected to the sensing circuitry during a precharge stage and disconnected during a sensing stage.
  • A reference voltage is provided to the precharge circuitry, which is mirrored to the memory cell by mirroring current flow.

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      1. Potential Applications
  • This technology can be applied in various memory systems, such as DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory).
  • It can be used in computer systems, mobile devices, and other electronic devices requiring memory storage.
      1. Problems Solved
  • Efficient operation of memory cells by providing a reference voltage and mirroring current flow.
  • Improved performance and reliability of memory systems during precharge and sensing stages.
      1. Benefits
  • Enhanced memory cell operation through the use of precharge circuitry and reference voltage.
  • Increased speed and accuracy in data storage and retrieval processes.
  • Improved overall efficiency and functionality of memory systems.


Original Abstract Submitted

Systems and methods for operating a memory include a sensing circuitry connected to a memory cell through an address decoder, a precharge circuitry configured to be connected to the sensing circuitry during a precharge stage and at least partially disconnected from the sensing circuitry during a sensing stage immediately following the precharge stage, and a reference voltage provided to the precharge circuitry, wherein the reference voltage is mirrored to the memory cell by mirroring a current flowing from the precharge circuitry with a current flowing from the sensing circuitry during the precharge stage.