17886917. RECESSED CHANNEL FIN INTEGRATION simplified abstract (Micron Technology, Inc.)
Contents
RECESSED CHANNEL FIN INTEGRATION
Organization Name
Inventor(s)
Sangmin Hwang of Boise ID (US)
RECESSED CHANNEL FIN INTEGRATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17886917 titled 'RECESSED CHANNEL FIN INTEGRATION
Simplified Explanation
The patent application describes an apparatus with a recessed channel FinFET, which includes fin structures recessed between the source and drain regions.
- The recessed channel FinFET has fin structures that are recessed from the top level of the source and drain regions.
- The gate of the recessed channel FinFET is also recessed from the top level of the source and drain regions, separated from the tip regions of the fin structures by a gate dielectric.
- The gate dielectric defines a channel between the source and drain regions.
- Recessed channel FinFETs can be used in the periphery of a memory device and can be fabricated in a process merged with forming access lines to the array.
---
- Potential Applications
- Memory devices
- Integrated circuits
- Semiconductor devices
- Problems Solved
- Improved performance of FinFET devices
- Enhanced control over channel region
- Integration with memory device fabrication processes
- Benefits
- Higher efficiency and performance
- Better control over current flow
- Compatibility with existing fabrication processes
Original Abstract Submitted
A variety of applications can include apparatus having a recessed channel FinFET. The recessed channel FinFET can include one or more fin structures between the source region and the drain region, where the one or more fin structures are recessed from a top level of the source region and from a top level of the drain region. The recessed channel FinFET can include a gate recessed from the top level of a source region and a drain region, where the gate can be separated from tip regions of the fin structures by a gate dielectric defining a channel between the source region and the drain region. Recessed channel FinFETs can be structured in a periphery to an array of a memory device and can be fabricated in a process merged with forming access lines to the array.
