17876389. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Kuan-Kan Hu of Hsinchu (TW)

Jhih-Rong Huang of Hsinchu County (TW)

Yi-Bo Liao of Hsinchu (TW)

Shuen-Shin Liang of Hsinchu County (TW)

Min-Chiang Chuang of Taoyuan City (TW)

Sung-Li Wang of Hsinchu County (TW)

Wei-Yen Woon of Taoyuan City (TW)

Szuya Liao of Hsinchu County (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17876389 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The abstract of the patent application describes a method for manufacturing a semiconductor device. The method involves the following steps:

1. Formation of a first transistor over a substrate, which includes a first source/drain feature. 2. Deposition of an interlayer dielectric layer around the first transistor. 3. Etching an opening in the interlayer dielectric layer to expose the first source/drain feature. 4. Conformal deposition of a semimetal layer over the interlayer dielectric layer, with a first portion in the opening and a second portion over the top surface of the interlayer dielectric layer. 5. Formation of a source/drain contact in the opening in the interlayer dielectric layer.

Bullet points explaining the patent/innovation:

• The method involves forming a transistor and depositing an interlayer dielectric layer around it.
• An opening is etched in the interlayer dielectric layer to expose the source/drain feature of the transistor.
• A semimetal layer is conformally deposited, covering both the opening and the top surface of the interlayer dielectric layer.
• A source/drain contact is formed in the opening in the interlayer dielectric layer.

Potential applications of this technology:

• Manufacturing of semiconductor devices, such as integrated circuits and microprocessors.
• Fabrication of transistors with improved performance and reliability.

Problems solved by this technology:

• Provides a method for forming a source/drain contact in a semiconductor device, improving electrical connectivity.
• Enables the integration of semimetal layers, which can enhance device performance.

Benefits of this technology:

• Improved electrical connectivity between the source/drain feature and the interlayer dielectric layer.
• Enhanced performance and reliability of the semiconductor device.
• Increased integration capabilities with the use of semimetal layers.

Original Abstract Submitted

A method for manufacturing a semiconductor device is provided. The method includes forming a first transistor over a substrate, wherein the first transistor comprises a first source/drain feature; depositing an interlayer dielectric layer around the first transistor; etching an opening in the interlayer dielectric layer to expose the first source/drain feature; conformably depositing a semimetal layer over the interlayer dielectric layer, wherein the semimetal layer has a first portion in the opening in the interlayer dielectric layer and a second portion over a top surface of the interlayer dielectric layer; and forming a source/drain contact in the opening in the interlayer dielectric layer.