17867142. APPARATUS AND METHOD WITH CACHE CONTROL simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
APPARATUS AND METHOD WITH CACHE CONTROL
Organization Name
Inventor(s)
APPARATUS AND METHOD WITH CACHE CONTROL - A simplified explanation of the abstract
This abstract first appeared for US patent application 17867142 titled 'APPARATUS AND METHOD WITH CACHE CONTROL
Simplified Explanation
The abstract describes a computing apparatus that receives control information from a host device to control a cache area. It generates a cache configuration based on the received control information and determines a first cache area and a second cache area in the memory of the computing apparatus. The first cache area is used to cache instructions, while the second cache area is used to cache data. The apparatus then processes a thread based on the cached instructions and data.
- Computing apparatus receives control information from a host device to control cache area
- Generates cache configuration based on received control information
- Determines first cache area for instructions and second cache area for data in memory
- Caches one or more instructions to the first cache area
- Caches data to the second cache area
- Processes a thread using the cached instructions and data
Potential Applications
- This technology can be applied in various computing devices such as computers, servers, and mobile devices.
- It can be used in multi-threaded applications where efficient caching of instructions and data is crucial for performance.
Problems Solved
- Efficient caching of instructions and data is essential for improving the performance of computing devices.
- This technology solves the problem of managing cache areas and optimizing the caching process based on control information from a host device.
Benefits
- Improved performance and efficiency in processing threads by caching instructions and data separately.
- Flexibility in configuring cache areas based on control information from a host device.
- Enhanced overall system performance by optimizing the caching process.
Original Abstract Submitted
A computing apparatus is provided. The computing apparatus is configured to receive control information from a host device to control a cache area, generate a cache configuration based on the received control information, determine a first cache area and a second cache area in a memory in the computing apparatus based on the generated cache configuration, cache one or more instructions to the first cache area and cache data to the second cache area, and process a thread based on the one or more cached instructions and the cached data.
