17854147. DECODING DEVICE AND OPERATING METHOD THEREOF simplified abstract (Samsung Electronics Co., Ltd.)

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DECODING DEVICE AND OPERATING METHOD THEREOF

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Miyeon Lee of SEONGNAM-SI (KR)

DECODING DEVICE AND OPERATING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17854147 titled 'DECODING DEVICE AND OPERATING METHOD THEREOF

Simplified Explanation

The abstract describes a decoding device that includes a controller, two decoders, and two memories. The device classifies a bitstream into two separate bitstreams based on blocks defined by a matrix. The first decoder decodes the first bitstream and outputs first decoding data, while the second decoder decodes the second bitstream and outputs second decoding data. The first decoding data is transmitted to the second memory via a first buffer, and the second decoding data is transmitted to the first memory via a second buffer. The first processor controls the second memory to store the first decoding data, and the second processor controls the first memory to store the second decoding data.

  • The decoding device classifies a bitstream into two separate bitstreams based on blocks defined by a matrix.
  • Two decoders perform decoding on the separate bitstreams and output decoding data.
  • Two memories are used to store the decoding data from the respective decoders.
  • The decoding data is transmitted between the memories using two buffers.
  • The first processor controls the second memory, and the second processor controls the first memory.

Potential Applications

  • Video decoding devices
  • Audio decoding devices
  • Data transmission systems

Problems Solved

  • Efficient decoding of bitstreams with multiple blocks
  • Simultaneous decoding of separate bitstreams
  • Memory management for storing decoding data

Benefits

  • Improved decoding efficiency
  • Simultaneous decoding of multiple bitstreams
  • Reduced memory usage


Original Abstract Submitted

A decoding device includes a controller classifying a bitstream as a first bitstream and a second bitstream based on a plurality of blocks defined by a matrix and included in a frame, a first decoder including a first processor performing decoding on the first bitstream and outputting first decoding data and a first memory, a second decoder including a second processor performing decoding on the second bitstream and outputting second decoding data and a second memory, a first buffer transmitting the first decoding data to the second memory, and a second buffer transmitting the second decoding data to the first memory. The first processor controls the second memory to store the first decoding data, and the second processor controls the first memory to store the second decoding data.

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