17849945. SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICONDUCTOR INTEGRATED CIRCUIT, AND A SEMICONDUCTOR SYSTEM simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICONDUCTOR INTEGRATED CIRCUIT, AND A SEMICONDUCTOR SYSTEM
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICONDUCTOR INTEGRATED CIRCUIT, AND A SEMICONDUCTOR SYSTEM - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICONDUCTOR INTEGRATED CIRCUIT, AND A SEMICONDUCTOR SYSTEM
Organization Name
Inventor(s)
Hyungil Woo of Hwaseong-si (KR)
SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICONDUCTOR INTEGRATED CIRCUIT, AND A SEMICONDUCTOR SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 17849945 titled 'SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICONDUCTOR INTEGRATED CIRCUIT, AND A SEMICONDUCTOR SYSTEM
Simplified Explanation
The abstract describes a semiconductor integrated circuit that receives a test scan input, test clock, and test mode signal, and outputs a secure scan output signal. The circuit includes several components such as a secure key circuit, key comparator, chip, scan output remapper, and secure scan controller.
- The secure key circuit generates delay input signals that are differently delayed from the test scan input and captures them in response to the test clock to generate an input key signal.
- The key comparator compares the input key signal with a preset reference key to generate a verification result indicating whether they are identical.
- The chip generates a scan output signal based on the test scan input.
- The scan output remapper obfuscates the scan output signal based on the verification result and outputs the obfuscated scan output signal as the secure scan output signal.
- The secure scan controller controls the operation of the secure key circuit, key comparator, chip, and remapper.
Potential Applications
- This technology can be used in secure communication systems to protect sensitive data during testing and scanning processes.
- It can be applied in integrated circuits used in industries such as defense, finance, and healthcare where data security is crucial.
Problems Solved
- The technology addresses the issue of potential security vulnerabilities during testing and scanning of integrated circuits.
- It ensures that sensitive data cannot be easily accessed or compromised during these processes.
Benefits
- The secure key circuit and verification process provide an added layer of security to prevent unauthorized access to sensitive data.
- The obfuscation of the scan output signal further enhances the security of the system.
- The technology can be easily integrated into existing semiconductor integrated circuits, minimizing the need for major design changes.
Original Abstract Submitted
A semiconductor integrated circuit to receive a test scan input, a test clock, and a test mode signal and output a secure scan output signal, the integrated circuit including: a secure key circuit to generate delay input signals, which are differently delayed from the test scan input, and to generate an input key signal by capturing the delay input signals in response to the test clock; a key comparator to generate a verification result indicating whether an input key of the input key signal is identical with a preset reference key; a chip to generate a scan output signal based on the test scan input; a scan output remapper to obfuscate the scan output signal according to the verification result and to output the obfuscated scan output signal as the secure scan output signal; and a secure scan controller to control the secure key circuit, key comparator, chip, and remapper.
