17843967. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

TAEWON Yoo of Seoul (KR)

JONGYOUN Kim of Seoul (KR)

KYOUNG LIM Suk of Suwon-si (KR)

SEOKHYUN Lee of Hwaseong-si (KR)

HYEONJEONG Hwang of Cheonan-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17843967 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The patent application describes a semiconductor package that includes multiple layers and patterns to improve heat dissipation and performance. Here are the key points:

  • The semiconductor package consists of a first redistribution substrate with an insulating layer and redistribution pattern.
  • A lower semiconductor chip is mounted on the first redistribution substrate.
  • A conductive structure is placed on the first redistribution substrate, spaced horizontally from the lower semiconductor chip.
  • A first mold layer covers the lower semiconductor chip and conductive structure, sandwiched between the first and second redistribution substrates.
  • The second redistribution substrate is located on top of the first redistribution substrate, consisting of a second insulating layer and redistribution pattern.
  • A first heat-dissipation pattern is positioned between the lower semiconductor chip and the second insulating layer.
  • A heat-dissipation pad is present on the conductive structure.
  • The top surface of the first heat-dissipation pattern is higher than the top surface of the conductive structure.

Potential applications of this technology:

  • Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
  • High-performance computing systems.
  • Automotive electronics.
  • Internet of Things (IoT) devices.

Problems solved by this technology:

  • Improved heat dissipation, preventing overheating and enhancing overall performance.
  • Efficient redistribution of electrical signals within the semiconductor package.
  • Enhanced reliability and durability of the semiconductor package.

Benefits of this technology:

  • Better thermal management, leading to improved performance and longevity of electronic devices.
  • Increased signal integrity and reduced signal loss within the semiconductor package.
  • Compact design, allowing for smaller and thinner electronic devices.
  • Cost-effective manufacturing process.


Original Abstract Submitted

A semiconductor package is disclosed. The semiconductor package may include a first redistribution substrate including a first insulating layer and a first redistribution pattern, a lower semiconductor chip mounted on the first redistribution substrate, a conductive structure disposed on the first redistribution substrate and horizontally spaced apart from the lower semiconductor chip, a first mold layer interposed between the first redistribution substrate and the second redistribution substrate to cover the lower semiconductor chip and the conductive structure, a second redistribution substrate on the first redistribution substrate, the second redistribution substrate including a second insulating layer and a second redistribution pattern, a first heat-dissipation pattern interposed between the lower semiconductor chip and the second insulating layer, and a heat-dissipation pad on the conductive structure. A top surface of the first heat-dissipation pattern may be located at a level higher than a top surface of the conductive structure.