17832609. EPITAXIAL FEATURES IN SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD OF THE SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

EPITAXIAL FEATURES IN SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD OF THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chung-Chi Wen of Taipei City (TW)

Yen-Ting Chen of Taichung City (TW)

Wei-Yang Lee of Taipei City (TW)

Chih-Chiang Chang of Hsinchu County (TW)

Chien-I Kuo of Chiayi County (TW)

Chia-Pin Lin of Hsinchu County (TW)

EPITAXIAL FEATURES IN SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD OF THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17832609 titled 'EPITAXIAL FEATURES IN SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD OF THE SAME

Simplified Explanation

The patent application describes a method for fabricating a semiconductor device with improved performance. Here are the key points:

• The method involves creating a semiconductor fin that extends from a substrate.
• A dummy gate structure is formed across the semiconductor fin.
• A portion of the semiconductor fin adjacent to the dummy gate structure is recessed, creating a recess.
• A semiconductor layer is grown within the recess.
• A first dielectric layer is placed between the semiconductor layer and the dummy gate structure.
• The semiconductor layer covers part of the first dielectric layer.
• The shape of the semiconductor layer is modified to expose a portion of the first dielectric layer.
• A second dielectric layer is deposited, covering both the semiconductor layer and the exposed portion of the first dielectric layer.
• The dummy gate structure is replaced with a metal gate structure.

Potential applications of this technology:

• This method can be used in the fabrication of advanced semiconductor devices, such as transistors.
• It can improve the performance and efficiency of these devices.

Problems solved by this technology:

• The method addresses the challenge of fabricating high-performance semiconductor devices with improved electrical characteristics.
• It solves the problem of reducing leakage current and improving transistor performance.

Benefits of this technology:

• The method allows for the creation of a recessed semiconductor layer, which can enhance device performance.
• It enables the use of a metal gate structure, which can further improve device characteristics.
• The technology can lead to more efficient and powerful semiconductor devices.

Original Abstract Submitted

A method includes forming a semiconductor fin protruding from a substrate, forming a dummy gate structure across the semiconductor fin, recessing a portion of the semiconductor fin in a region adjacent the dummy gate structure to form a recess, growing a semiconductor layer in the recess, and forming a first dielectric layer interposing the semiconductor layer and the dummy gate structure. The semiconductor layer covers at least a portion of the first dielectric layer. The method also includes modifying a shape of the semiconductor layer to expose the portion of the first dielectric layer, depositing a second dielectric layer covering the semiconductor layer and the portion of the first dielectric layer, and replacing the dummy gate structure with a metal gate structure.