17821763. STATIC CMOS-BASED FULL ADDER CIRCUITS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
STATIC CMOS-BASED FULL ADDER CIRCUITS
Organization Name
Inventor(s)
Debojyoti Banerjee of Bengaluru (IN)
Abhishek Ghosh of Bengaluru (IN)
Raghavendra Ramakant Shirodkar of Bengaluru (IN)
Rakesh Dimri of Bengaluru (IN)
Utkarsh Garg of Bengaluru (IN)
STATIC CMOS-BASED FULL ADDER CIRCUITS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17821763 titled 'STATIC CMOS-BASED FULL ADDER CIRCUITS
Simplified Explanation
The patent application describes an apparatus that includes an integrated circuit with a static complementary metal-oxide-semiconductor (CMOS) based full adder circuit. The integrated circuit has several components including a carry generation circuit, a carry propagation circuit, a carry output generation circuit, and a sum generation circuit.
- The carry generation circuit takes two inputs and generates a carry.
- The carry propagation circuit takes three inputs and generates a propagated output.
- The carry output generation circuit takes the generated carry and the propagated output to generate a final carry as an output.
- The sum generation circuit generates a sum output and includes the carry generation circuit. It takes three inputs and generates an exclusive NOR output. It then uses the exclusive NOR output and the third input to generate the sum output.
Potential applications of this technology:
- Integrated circuits and microprocessors
- Arithmetic and logic units in computer systems
- Digital signal processing applications
Problems solved by this technology:
- Efficient generation of carry and sum outputs in full adder circuits
- Improved performance and reliability of integrated circuits
Benefits of this technology:
- Reduced power consumption
- Faster processing speed
- Higher accuracy in arithmetic calculations
Original Abstract Submitted
Provided is an apparatus that includes an integrated circuit including a static complementary metal-oxide-semiconductor based full adder circuit. The integrated circuit includes a carry generation circuit configured to receive a first input and a second input to generate a carry, and a carry propagation circuit configured to receive the first input, the second input, and a third input to generate a propagated output. The integrated circuit further includes a carry output generation circuit configured to receive the generated carry and the propagated output to generate a final carry as an output, and a sum generation circuit configured to generate a sum output. The sum generation circuit includes the carry generation circuit and is configured to receive the first input, the second input, and generated carry to generate an exclusive NOR output, and further uses the generated exclusive NOR output and the third input to generate the sum output.
