17814458. SLEEP MODE USING SHARED MEMORY BETWEEN TWO PROCESSORS OF AN INFORMATION HANDLING SYSTEM simplified abstract (Dell Products L.P.)

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SLEEP MODE USING SHARED MEMORY BETWEEN TWO PROCESSORS OF AN INFORMATION HANDLING SYSTEM

Organization Name

Dell Products L.P.

Inventor(s)

Shekar Babu Suryanarayana of Bangalore (IN)

Daniel L. Hamlin of Round Rock TX (US)

SLEEP MODE USING SHARED MEMORY BETWEEN TWO PROCESSORS OF AN INFORMATION HANDLING SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 17814458 titled 'SLEEP MODE USING SHARED MEMORY BETWEEN TWO PROCESSORS OF AN INFORMATION HANDLING SYSTEM

Simplified Explanation

An information handling system is described that uses two separate processors in a big-little hybrid configuration. When the system enters sleep mode, control of certain processes is transitioned from the main processor to the hybrid processor, which is more power efficient. The system can transition control back to the main processor when sleep mode ends. This approach reduces battery drainage compared to typical sleep mode.

  • The information handling system utilizes two processors in a big-little hybrid configuration.
  • Control of certain processes is transitioned from the main processor to the hybrid processor during sleep mode.
  • The hybrid processor is more power efficient, resulting in reduced battery drainage during sleep mode.
  • Control of the processes can be transitioned back to the main processor when sleep mode ends.

Potential Applications:

  • Mobile devices such as smartphones and tablets that require efficient power management during sleep mode.
  • Internet of Things (IoT) devices that need to conserve battery power while still performing background tasks.

Problems Solved:

  • Battery drainage during sleep mode is reduced compared to typical sleep mode.
  • The system can perform background and value-adding activities in sleep mode using a more power-efficient processor.

Benefits:

  • Extended battery life for mobile devices and IoT devices.
  • Improved power efficiency during sleep mode.
  • Seamless transition of control between processors for optimal performance and power management.


Original Abstract Submitted

An information handling system is provided that utilizes two separate processors in a big-little hybrid configuration and transitions control over certain processes that may be active during sleep mode from the big, or main, processor with higher processing capabilities to the little, or hybrid, processor with greater power efficiency upon sleep mode being triggered. Control of the processes can be transitioned back to the main processor upon sleep mode being terminated. Transitioning control of these processes in this way results in reduced battery drainage compared to typical sleep mode since the provided information handling system performs the background and value adding activities in sleep mode using a processor that has greater power efficiency than which is used in typical sleep mode.

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