17740508. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
JONGHO Park of Cheonan-si (KR)
SEONG-HOON Bae of Cheonan-si (KR)
JU-IL Choi of Seongnam-si (KR)
ATSUSHI Fujisaki of Seongnam-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17740508 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The patent application describes a semiconductor device that includes a redistribution substrate, a semiconductor chip, a conductive structure, and a molding layer.
- The semiconductor chip is placed on the top surface of the redistribution substrate.
- The conductive structure is located on the top surface of the redistribution substrate and is spaced apart from the semiconductor chip.
- The molding layer covers the sidewalls of both the semiconductor chip and the conductive structure.
- The conductive structure consists of two layers: the first conductive structure and the second conductive structure.
- The first conductive structure has an undercut at the lower portion of its sidewall.
- The second conductive structure has a protrusion at the lower portion of its sidewall.
Potential applications of this technology:
- Integrated circuits and electronic devices that require efficient redistribution of signals and power.
- Semiconductor devices used in various industries such as telecommunications, consumer electronics, and automotive.
Problems solved by this technology:
- Provides a reliable and efficient method for redistributing signals and power in a semiconductor device.
- Helps to reduce signal loss and improve overall performance.
Benefits of this technology:
- Improved signal integrity and power distribution within the semiconductor device.
- Enhanced reliability and performance of integrated circuits and electronic devices.
- Simplified manufacturing process for semiconductor devices.
Original Abstract Submitted
A semiconductor device includes a first redistribution substrate, a semiconductor chip on a top surface of the first redistribution substrate, a conductive structure on the top surface of the first redistribution substrate and laterally spaced apart from the semiconductor chip, and a molding layer on the first redistribution substrate and covering a sidewall of the semiconductor chip and a sidewall of the conductive structure. The conductive structure includes a first conductive structure having a first sidewall, and a second conductive structure on a top surface of the first conductive structure and having a second sidewall. The first conductive structure has an undercut at a lower portion of the first sidewall. The second conductive structure has a protrusion at a lower portion of the second sidewall.
