17739618. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17739618 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in this patent application includes multiple bonding semiconductor chips and stacked semiconductor chips. The key features of this innovation are:
- The package consists of a first bonding semiconductor chip and a second bonding semiconductor chip stacked on top of it. The second chip has a smaller cross-section area in the horizontal direction compared to the first chip.
- A chip connection pad is present between the first and second bonding semiconductor chips, facilitating their electrical connection.
- A wire bonding pad is located on the first bonding semiconductor chip, outside of the second chip.
- The package also includes a first stacked semiconductor chip with a chip pad on its upper surface.
- A second stacked semiconductor chip is placed on top of the first chip, exposing the first chip pad, and having a second chip pad on its upper surface.
Potential applications of this technology:
- This semiconductor package design can be used in various electronic devices, such as smartphones, tablets, and computers.
- It can be applied in the automotive industry for advanced driver-assistance systems (ADAS), infotainment systems, and other vehicle electronics.
- The technology can also find use in industrial automation, robotics, and IoT devices.
Problems solved by this technology:
- The design allows for compact and efficient integration of multiple semiconductor chips, reducing the overall size of the package.
- By stacking chips with different cross-section areas, the package can accommodate chips with varying functionalities and optimize space utilization.
- The chip connection pad and wire bonding pad enable reliable electrical connections between the chips.
Benefits of this technology:
- The smaller size of the semiconductor package allows for more compact and lightweight electronic devices.
- The stacked chip design enables increased functionality and performance within limited space.
- The reliable electrical connections ensure proper communication and data transfer between the chips, enhancing overall device performance.
Original Abstract Submitted
A semiconductor package includes: a semiconductor structure including: a first bonding semiconductor chip; a second bonding semiconductor chip on the first bonding semiconductor chip, the second bonding semiconductor chip having a cross-section area in a horizontal direction less than a cross-section area of the first bonding semiconductor chip in the horizontal direction; a chip connection pad between the first bonding semiconductor chip and the second bonding semiconductor chip; and a wire bonding pad on the first bonding semiconductor chip to be outside of the second bonding semiconductor chip; a first stacked semiconductor chip on the semiconductor structure and including a first chip pad on an upper surface thereof; and a second stacked semiconductor chip on the first stacked semiconductor chip to expose the first chip pad and including a second chip pad on an upper surface thereof.
