17716278. SEMICONDUCTOR DEVICES simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICES
Organization Name
Inventor(s)
Dong Kwon Kim of Suwon-si (KR)
SEMICONDUCTOR DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17716278 titled 'SEMICONDUCTOR DEVICES
Simplified Explanation
The patent application describes a semiconductor device that includes various components such as a substrate, active pattern, gate electrodes, interlayer insulating layer, gate spacer, and gate cut.
- The device includes a substrate and an active pattern surrounded by a field insulating layer.
- There are first and second gate electrodes on the active pattern, extending in a different direction from the active pattern.
- An interlayer insulating layer surrounds the sidewalls of the gate electrodes.
- A gate spacer is present on the opposing sidewalls of each gate electrode, contacting the interlayer insulating layer.
- The gate spacer includes a first sidewall and a second sidewall, and a first gate cut divides the second gate electrode into two portions.
- The first gate cut is made of the same material as the gate spacer and has a smaller width than the gate spacer.
Potential applications of this technology:
- Semiconductor manufacturing industry
- Electronics industry
- Mobile devices
- Computer processors
Problems solved by this technology:
- Improved performance and functionality of semiconductor devices
- Enhanced integration of components
- Reduction in size and power consumption
Benefits of this technology:
- Increased efficiency and speed of semiconductor devices
- Higher level of integration and miniaturization
- Improved overall performance and functionality
Original Abstract Submitted
A semiconductor device includes: a substrate; an active pattern and a field insulating layer surrounding a sidewall of the active pattern on the substrate; first and second gate electrodes on the active pattern and extending in a direction different from that of the active pattern; an interlayer insulating layer surrounding a sidewall of each of the first and second gate electrodes; a gate spacer on opposing sidewalls of each of the first and second gate electrodes that includes a first sidewall and a second sidewall opposite the first sidewall in the first horizontal direction, each of which contacts the interlayer insulating layer; and a first gate cut dividing the second gate electrode into two portions, wherein the first gate cut includes a same material as the gate spacer; and wherein a first width of the first gate cut is smaller than a second width of the gate spacer.
