17712358. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Young Lyong Kim of Anyang-si (KR)
Hyunsoo Chung of Hwaseong-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17712358 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The patent application describes a semiconductor package that includes multiple semiconductor chips and a package substrate. The chips are connected through under-bump pads and solders, and are covered by a molding layer.
- The semiconductor package includes a first semiconductor chip and a second semiconductor chip stacked on top of each other.
- The second semiconductor chip has a redistribution layer on its bottom surface, which is connected to the first semiconductor chip through under-bump pads.
- The under-bump pads have first pads that are connected to substrate pads of the package substrate through first solders.
- The second pads of the under-bump pads are in direct contact with the top surface of the first semiconductor chip.
- The first pads are connected to an integrated circuit of the second semiconductor chip through the redistribution layer.
- The second pads are insulated from the integrated circuit of the second semiconductor chip.
Potential Applications
- This semiconductor package design can be used in various electronic devices that require multiple semiconductor chips to be stacked and connected together.
- It can be applied in mobile devices, such as smartphones and tablets, to improve performance and functionality.
- It can also be used in high-performance computing systems, automotive electronics, and other applications that require compact and efficient semiconductor packaging.
Problems Solved
- The design solves the problem of connecting multiple semiconductor chips in a stacked configuration, while ensuring proper electrical connections and insulation.
- It addresses the challenge of reducing the size and complexity of semiconductor packages, while maintaining reliable performance.
- It solves the issue of thermal management by providing a molding layer that covers the chips and solders, protecting them from external factors.
Benefits
- The semiconductor package design allows for a compact and efficient integration of multiple chips, saving space and reducing manufacturing costs.
- It provides improved electrical connections between the chips, resulting in enhanced performance and reliability.
- The design offers better thermal management, ensuring the chips are protected and operate within optimal temperature ranges.
Original Abstract Submitted
A semiconductor package includes a first semiconductor chip on a package substrate, a second semiconductor chip on the first semiconductor chip and having a redistribution layer on a bottom surface thereof, under-bump pads on a bottom surface of the redistribution layer, first solders adjacent to the first semiconductor chip and connecting first pads of the under-bump pads to substrate pads of the package substrate, and a molding layer on the package substrate and covering the first and second semiconductor chips and the first solders. Second pads of the under-bump pads are in direct contact with a top surface of the first semiconductor chip. The first pads are connected through the redistribution layer to an integrated circuit of the second semiconductor chip. The second pads are insulated from the integrated circuit of the second semiconductor chip.
