17702259. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Yong Ho Kim of Hwaseong-si (KR)

Bo In Noh of Suwon-si (KR)

Jeong Hoon Ahn of Seongnam-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17702259 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The patent application describes a semiconductor package that includes a first stack with a first semiconductor substrate, a through via that penetrates the substrate, and a second stack with a second face facing the first stack. The package also includes a first pad in contact with the through via on the first face of the first stack, and a second pad with a concave inner side face on the second face of the second stack. A bump connects the first pad and the second pad, with a first upper bump on the first pad and a first lower bump between the first upper bump and the first pad.

  • The semiconductor package includes a first and second stack with a through via that allows for electrical connections between the stacks.
  • The first pad on the first stack is in contact with the through via, providing a connection point for electrical signals.
  • The second pad on the second stack has a concave inner side face that creates an insertion recess for the bump.
  • The bump connects the first pad and the second pad, with a first upper bump and a first lower bump providing the connection.

Potential Applications

  • This semiconductor package can be used in various electronic devices that require compact and efficient electrical connections.
  • It can be applied in mobile devices, computers, automotive electronics, and other electronic systems.

Problems Solved

  • The semiconductor package solves the problem of providing a reliable and efficient electrical connection between different semiconductor substrates.
  • It addresses the need for compact and space-saving designs in electronic devices.

Benefits

  • The use of through vias and pads allows for efficient electrical connections between different semiconductor substrates.
  • The concave inner side face of the second pad provides a secure and stable insertion recess for the bump.
  • The design of the bump ensures a reliable and durable connection between the first and second pads.


Original Abstract Submitted

A semiconductor package is provided. The semiconductor package includes: a first stack including a first semiconductor substrate; a through via that penetrates the first semiconductor substrate in a first direction; a second stack that includes a second face facing a first face of the first stack, on the first stack; a first pad that is in contact with the through via, on the first face of the first stack; a second pad including a concave inner side face that defines an insertion recess, the second pad located on the second face of the second stack; and a bump that connects the first pad and the second pad, wherein the bump includes a first upper bump on the first pad, and a first lower bump between the first upper bump and the first pad.

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