17699525. CHIP-ON-FILM PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

From WikiPatents
Jump to navigation Jump to search

CHIP-ON-FILM PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

KwanJai Lee of Yongin-si (KR)

Jae-Min Jung of Seoul (KR)

Jeong-Kyu Ha of Hwaseong-si (KR)

Sang-Uk Han of Asan-si (KR)

CHIP-ON-FILM PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17699525 titled 'CHIP-ON-FILM PACKAGE

Simplified Explanation

The abstract describes a chip-on-film package design for semiconductor chips. Here is a simplified explanation of the abstract:

  • The chip-on-film package includes a film substrate that has a chip region and an edge region.
  • A semiconductor chip is mounted on the top surface of the film substrate, specifically on the chip region.
  • The semiconductor chip has a chip pad adjacent to its bottom surface.
  • An input line and an output line are provided on the edge region of the film substrate, both located on the top surface.
  • A connection terminal is placed between the film substrate and the semiconductor chip.
  • A redistribution pattern is positioned between the semiconductor chip and the connection terminal.

Potential applications of this technology:

  • Semiconductor packaging industry
  • Electronics manufacturing

Problems solved by this technology:

  • Provides a compact and efficient packaging solution for semiconductor chips
  • Enables better connectivity and signal transmission between the chip and external components

Benefits of this technology:

  • Reduces the size and weight of the package
  • Improves electrical performance and signal integrity
  • Enhances overall reliability and durability of the chip package


Original Abstract Submitted

A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.