17682465. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Kyoung Lim Suk of Suwon-si (KR)
Seokhyun Lee of Hwaseong-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17682465 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The abstract describes a semiconductor package that includes a first substrate with three under-bump patterns, a semiconductor chip, conductive structures, and a second substrate. The third under-bump pattern is isolated from the first and second patterns. The conductive structures consist of a first, second, and third structure, with the third structure placed between the first and second structures. The first and second under-bump patterns are wider than the third under-bump pattern.
- The semiconductor package includes a first substrate with multiple under-bump patterns.
- A semiconductor chip is placed on the first substrate.
- Conductive structures are present on the first substrate.
- A second substrate is placed on top of the semiconductor chip and conductive structures.
- The third under-bump pattern is electrically isolated from the first and second patterns.
- The conductive structures consist of a first, second, and third structure.
- The third structure is positioned between the first and second structures.
- The first and second under-bump patterns are wider than the third under-bump pattern.
Potential Applications
- This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers.
- It can be applied in automotive electronics, aerospace systems, and industrial equipment.
Problems Solved
- The isolation of the third under-bump pattern from the first and second patterns helps prevent electrical interference and improves overall performance.
- The different widths of the under-bump patterns allow for optimized electrical connections and signal transmission.
Benefits
- The semiconductor package provides improved electrical isolation and performance.
- The optimized design of the under-bump patterns enhances electrical connections and signal transmission.
- The package can be used in a wide range of electronic devices and applications.
Original Abstract Submitted
A semiconductor package is provided. The semiconductor package includes a first substrate including a first, second and third under-bump patterns; a semiconductor chip provided on the first substrate; conductive structures provided on the first substrate; and a second substrate provided on the semiconductor chip and the conductive structures. The third under-bump pattern is electrically isolated from the first and second under-bump patterns. The conductive structures include: a first conductive structure coupled to the first under-bump pattern; a second conductive structure coupled to the second under-bump pattern; and a third conductive structure coupled to the third under-bump pattern and provided adjacent to the first and second conductive structures. The third conductive structure is provided between the first conductive structure and the second conductive structure, the first under-bump pattern is wider than the third under-bump pattern, and the second under-bump pattern is wider than the third under-bump pattern.