17550993. DECISION FEEDBACK EQUALIZER FOR LOW-VOLTAGE HIGH-SPEED SERIAL LINKS simplified abstract (QUALCOMM Incorporated)
Contents
DECISION FEEDBACK EQUALIZER FOR LOW-VOLTAGE HIGH-SPEED SERIAL LINKS
Organization Name
Inventor(s)
Darius Valaee of San Diego CA (US)
Patrick Isakanian of El Dorado Hills CA (US)
DECISION FEEDBACK EQUALIZER FOR LOW-VOLTAGE HIGH-SPEED SERIAL LINKS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17550993 titled 'DECISION FEEDBACK EQUALIZER FOR LOW-VOLTAGE HIGH-SPEED SERIAL LINKS
Simplified Explanation
The patent application describes a comparator that consists of an input stage and a regeneration stage. The input stage includes two input circuits and two switching transistors, which are controlled based on the previous bit value. The regeneration stage includes two inverters and two drive transistors, which are coupled to the input stage.
- The comparator has an input stage with two input circuits and two switching transistors.
- The switching transistors enable the input circuits based on the previous bit value.
- The comparator also has a regeneration stage with two inverters and two drive transistors.
- The drive transistors are coupled to the inverters and controlled by the input stage.
Potential applications of this technology:
- Digital signal processing
- Data communication systems
- Analog-to-digital converters
- Microprocessors and microcontrollers
Problems solved by this technology:
- Improved accuracy and reliability in comparing digital signals
- Efficient utilization of circuit resources
- Reduction of power consumption
Benefits of this technology:
- Higher performance and faster operation
- Reduced circuit complexity and size
- Lower power consumption and energy efficiency
Original Abstract Submitted
In certain aspects, a comparator includes an input stage and a regeneration stage. The input stage includes a first input circuit coupled to a first node and a second node, a first switching transistor configured to enable the first input circuit if a previous bit value is one, a second input circuit coupled to the first node and the second node, and a second switching transistor configured to enable the second input circuit if the previous bit value is zero. The regeneration stage includes a first inverter, a second inverter cross coupled with the first inverter, a first drive transistor coupled to the first inverter, wherein a gate of the first drive transistor is coupled to the second node, and a second drive transistor coupled to the second inverter, wherein a gate of the second drive transistor is coupled to the first node.
