Samsung electronics co., ltd. (20240332256). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Jing Cheng Lin of Suwon-si (KR)
Young Kun Jee of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240332256 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the abstract includes a package substrate with a mounting region and an edge region, a bridge chip, connection pads, a mold layer, semiconductor chips, and conductive posts.
- The package substrate has a mounting region for the bridge chip and connection pads, as well as an edge region for additional connection pads.
- The bridge chip is located on the top surface of the mounting region of the package substrate.
- Connection pads are present on the mounting region and spaced apart from the bridge chip, as well as on the edge region.
- A mold layer surrounds the bridge chip, connection pads, and semiconductor chips.
- Semiconductor chips are mounted on the connection pads and the bridge chip.
- Conductive posts are located on the connection pads on the edge region of the package substrate.
Potential Applications: - This technology can be used in various electronic devices such as smartphones, tablets, and computers. - It can also be applied in automotive electronics, medical devices, and industrial equipment.
Problems Solved: - Provides a compact and efficient way to connect semiconductor chips within a package. - Enhances the overall performance and reliability of electronic devices.
Benefits: - Improved connectivity and signal transmission. - Enhanced durability and longevity of electronic components. - Cost-effective manufacturing process.
Commercial Applications: - This technology can be utilized by semiconductor manufacturers, electronics companies, and research institutions. - It has the potential to impact the consumer electronics market and various industries relying on electronic devices.
Questions about the technology: 1. How does the placement of the bridge chip impact the overall functionality of the semiconductor package? 2. What are the specific advantages of using conductive posts on the edge region of the package substrate?
Original Abstract Submitted
a semiconductor package includes a package substrate including a mounting region and an edge region at least partially surrounding the mounting region, a bridge chip on a top surface of the mounting region of the package substrate, a first connection pad and a second connection pad on the mounting region of the package substrate and spaced apart from the bridge chip, a third connection pad on the edge region of the package substrate, a first mold layer on the package substrate and at least partially surrounding the bridge chip, the first connection pad, the second connection pad and the third connection pad, a first semiconductor chip on the first connection pad and the bridge chip, a second semiconductor chip on the second connection pad and the bridge chip, and a conductive post on the third connection pad.
