Samsung electronics co., ltd. (20240321330). STORAGE DEVICE INCLUDING BUFFER CHIP AND METHOD FOR PER-PIN TRAINING USING BUFFER CHIP simplified abstract
Contents
STORAGE DEVICE INCLUDING BUFFER CHIP AND METHOD FOR PER-PIN TRAINING USING BUFFER CHIP
Organization Name
Inventor(s)
Jungjune Park of Suwon-si (KR)
STORAGE DEVICE INCLUDING BUFFER CHIP AND METHOD FOR PER-PIN TRAINING USING BUFFER CHIP - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321330 titled 'STORAGE DEVICE INCLUDING BUFFER CHIP AND METHOD FOR PER-PIN TRAINING USING BUFFER CHIP
Simplified Explanation: The patent application describes a storage device that includes a buffer chip and a memory device. The buffer chip delays the data strobe signal based on a comparison result to improve data transmission efficiency.
Key Features and Innovation:
- Memory device transmits random data signal and data strobe signal to buffer chip.
- Buffer chip includes delay circuit to delay data strobe signal.
- Sampler samples random data signal based on delayed data strobe signal.
- Comparator compares internal data with sampled data.
- Counter module determines target delay based on comparison result.
Potential Applications: This technology can be applied in various storage devices, data processing systems, and communication systems where efficient data transmission is crucial.
Problems Solved: The technology addresses issues related to data transmission delays, signal synchronization, and data processing efficiency in storage devices.
Benefits:
- Improved data transmission efficiency.
- Enhanced signal synchronization.
- Increased data processing speed.
Commercial Applications: Potential commercial applications include data storage systems, network servers, and communication devices where fast and reliable data transmission is essential for optimal performance.
Prior Art: Readers can explore prior art related to delay circuits, data sampling techniques, and signal processing in storage devices to understand the background of this technology.
Frequently Updated Research: Researchers are continually exploring advancements in delay circuits, data sampling methods, and signal processing algorithms to further improve data transmission efficiency in storage devices.
Questions about Storage Device Technology: 1. How does the delay circuit in the buffer chip improve data transmission efficiency? 2. What are the potential implications of this technology in the field of data storage and communication systems?
Original Abstract Submitted
a storage device includes a buffer chip and a memory device. the memory device transmits a random data signal and a data strobe signal to the buffer chip based on a clock signal received from the buffer chip. the buffer chip includes a delay circuit that delays the data strobe signal by a delay time to generate a delayed data strobe signal, a sampler that receives the delayed data strobe signal from the delay circuit and samples the random data signal based on the delayed data strobe signal to generate sampled data, a comparator that compares internal data with the sampled data to generate a comparison result, and a counter module that receives the comparison result from the comparator and determines a target delay based on the comparison result. the buffer chip delays the delayed data strobe signal based on the target delay.
