Samsung electronics co., ltd. (20240312886). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
JAEGWON Jang of Hwaseong-si (KR)
KYOUNG LIM Suk of Suwon-si (KR)
MINJUN Bae of Hwaseong-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240312886 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application consists of a redistribution substrate with an insulating layer and three redistribution patterns, as well as a semiconductor chip mounted on top of the substrate.
- The redistribution substrate includes three stacked redistribution patterns that are electrically connected to each other.
- Each redistribution pattern has a wire portion running parallel to the substrate's surface and a via portion extending perpendicularly from the wire portion.
- The second redistribution pattern also features fine wire patterns that are narrower than the wire portion of the pattern.
Potential Applications: - This technology can be used in various semiconductor packaging applications where space-saving and efficient electrical connections are required.
Problems Solved: - Provides a compact and efficient way to redistribute electrical connections in semiconductor packages. - Allows for more complex circuit designs in a smaller footprint.
Benefits: - Improved electrical connectivity and signal transmission. - Space-saving design for smaller and more efficient electronic devices.
Commercial Applications: - This technology can be applied in the manufacturing of smartphones, tablets, laptops, and other electronic devices where compact and efficient semiconductor packaging is crucial.
Questions about the technology: 1. How does this semiconductor package improve the overall performance of electronic devices? 2. What are the potential cost-saving benefits of implementing this technology in semiconductor manufacturing processes?
Frequently Updated Research: - Stay updated on the latest advancements in semiconductor packaging technology to ensure the most efficient and effective implementation of this innovation.
Original Abstract Submitted
a semiconductor package includes a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. the redistribution substrate includes an insulating layer, and first, second, and third redistribution patterns disposed in the insulating layer. the first to third redistribution patterns are sequentially stacked in an upward direction and are electrically connected to each other. each of the first to third redistribution patterns includes a wire portion that extends parallel to the top surface of the redistribution substrate. each of the first and third redistribution patterns further includes a via portion that extends from the wire portion in a direction perpendicular to the top surface of the redistribution substrate. the second redistribution pattern further includes first fine wire patterns that are less wide than the wire portion of the second redistribution pattern.
