Samsung electronics co., ltd. (20240234349). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
GWANGJAE Jeon of Suwon-si (KR)
Hyungchul Shin of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240234349 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application consists of lower and upper structures. The lower structure includes a first semiconductor substrate with first through vias, first signal pads, first dummy pads, and a first dielectric layer. The upper structure includes a second semiconductor substrate with second signal pads, second dummy pads, and a second dielectric layer. The first signal pad is in contact with one of the second signal pads, and the first dummy pad is in contact with one of the second dummy pads. The spacing between the first dummy pads is 0.5 to 1.5 times the spacing between the first signal pads.
- Lower structure with first semiconductor substrate, first through vias, first signal pads, first dummy pads, and first dielectric layer
- Upper structure with second semiconductor substrate, second signal pads, second dummy pads, and second dielectric layer
- Contact between first signal pad and second signal pad, and first dummy pad and second dummy pad
- Specific spacing ratio between first dummy pads and first signal pads
Potential Applications: - Semiconductor packaging industry - Electronics manufacturing
Problems Solved: - Improved signal transmission efficiency - Enhanced electrical connectivity
Benefits: - Better performance in semiconductor devices - Increased reliability in electronic systems
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Performance This technology can be used in various electronic devices such as smartphones, computers, and automotive systems to improve signal transmission and overall performance.
Questions about the technology: 1. How does the spacing ratio between the first dummy pads and first signal pads impact the performance of the semiconductor package? 2. What are the potential cost implications of implementing this advanced packaging technology in electronic devices?
Original Abstract Submitted
disclosed is a semiconductor package comprising lower and upper structure. the lower structure includes a first semiconductor substrate, first through vias vertically penetrating the first semiconductor substrate, first signal pads connected to the first through vias, first dummy pads between the first signal pads and electrically separated from the first through vias, and a first dielectric layer surrounding the first signal pads and the first dummy pads. the upper structure includes a second semiconductor substrate, second signal pads and second dummy pads, and a second dielectric layer surrounding the second signal pads and the second dummy pads. the first signal pad is in contact with one of the second signal pads. the first dummy pad is in contact with one of the second dummy pads. a first interval between the first dummy pads is 0.5 to 1.5 times a second interval between the first signal pads.
