Kioxia corporation (20240324216). SEMICONDUCTOR MEMORY DEVICE simplified abstract
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Hiroyuki Yamasaki of Nagoya Aichi (JP)
Masayoshi Tagami of Kuwana Mie (JP)
Katsuaki Isobe of Yokohama Kanagawa (JP)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240324216 titled 'SEMICONDUCTOR MEMORY DEVICE
The abstract describes a semiconductor memory device with two chips, where the first chip includes various components such as stacked bodies, semiconductor films, a contact plug, and planar wiring lines.
- The first chip includes a first stacked body, a first semiconductor film, a second stacked body, a second semiconductor film, a contact plug, and a first planar wiring line.
- The contact plug extends between the first and second stacked bodies in a specific direction.
- The first planar wiring line covers at least the contact plug and is connected to it.
- The first planar wiring line extends in multiple directions and is located opposite the second chip with respect to the first stacked body.
Potential Applications: - This technology can be used in various semiconductor memory devices to improve performance and efficiency. - It can be applied in electronic devices such as smartphones, computers, and servers.
Problems Solved: - Enhances the connectivity and functionality of semiconductor memory devices. - Optimizes the layout and design of memory components for better performance.
Benefits: - Improved data storage and retrieval speeds. - Enhanced overall efficiency and reliability of semiconductor memory devices.
Commercial Applications: - This technology has significant commercial potential in the semiconductor industry for manufacturing advanced memory devices. - It can be utilized by semiconductor companies to develop cutting-edge products for consumer electronics.
Questions about the technology: 1. How does this semiconductor memory device compare to traditional memory devices in terms of performance and efficiency? 2. What are the specific advantages of using stacked bodies and planar wiring lines in this semiconductor memory device?
Original Abstract Submitted
according to one embodiment, in a semiconductor memory device including a first chip and a second chip. the first chip includes a first stacked body, a first semiconductor film, a second stacked body, a second semiconductor film, a contact plug and a first planar wiring line. the contact plug extends in the third direction between the first stacked body and the second stacked body. the first planar wiring line is disposed on a side opposite to the second chip with respect to the first stacked body, the contact plug, and the second stacked body, the first planar wiring line extending in the first direction and the second direction, covering at least the contact plug, and being connected to the contact plug.
