Kabushiki Kaisha Toshiba patent applications on September 26th, 2024
Patent Applications by Kabushiki Kaisha Toshiba on September 26th, 2024
Kabushiki Kaisha Toshiba: 97 patent applications
Kabushiki Kaisha Toshiba has applied for patents in the areas of H01L23/00 (12), H01L29/06 (6), H01L29/739 (6), H01L29/417 (5), H01L29/78 (5) H01L29/1608 (3), H01L23/49562 (2), H01M4/485 (2), G11B5/607 (2), H03K17/04123 (2)
With keywords such as: semiconductor, electrode, region, surface, layer, portion, device, substrate, according, and embodiment in patent application abstracts.
Patent Applications by Kabushiki Kaisha Toshiba
Inventor(s): Takafumi SONOURA of Yokohama (JP) for kabushiki kaisha toshiba, Daisuke YAMAMOTO of Kawasaki (JP) for kabushiki kaisha toshiba, Hideki OGAWA of Shinagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): B62D7/15
CPC Code(s): B62D7/159
Abstract: a mobile vehicle includes: a vehicle body unit; a plurality of vehicle wheel parts; a first driving part configured to be connected to the vehicle wheel parts, and be able to rotate the vehicle wheel parts around a first rotation axis as its rotation center in a first rotation direction; a second driving part configured to connect the vehicle body unit and the first driving part, and be able to rotate the vehicle wheel parts and the first driving part around a second rotation axis as its rotation center in a second rotation direction; and a control unit configured to be disposed in the vehicle body unit and be able to control the first driving part and the second driving part. the vehicle wheel part includes a plurality of sub-vehicle wheel parts that are able to rotate in a third rotation direction different from the first rotation direction.
Inventor(s): Katsuhiko YAMADA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Ryo SAKAI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Shoya SANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Haruhiko YAMAGUTI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akihiro YAMADA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akira SATO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): B65D1/36, B65B5/08, B65D85/58
CPC Code(s): B65D1/36
Abstract: a ceramic ball storage tray includes a storage portion that stores a ceramic ball. the storage portion of the ceramic ball storage tray has a protruding portion formed such that a center of a bottom surface portion of the storage portion is hollow. a height of an outer circumferential surface of the protruding portion relative to a diameter of the ceramic ball is within a range of 0.05 or more and 0.30 or less. a height of the storage portion relative to the diameter of the ceramic ball is preferably within a range of 1.05 or more and 2.00 or less. a height of an inner circumferential surface of the protruding portion relative to the diameter of the ceramic ball is preferably within a range of 0.01 or more and 0.10 or less.
Inventor(s): Maki YONETSU of Mitaka (JP) for kabushiki kaisha toshiba, Yuki KUDO of Yokohama (JP) for kabushiki kaisha toshiba, Ryota KITAGAWA of Setagaya (JP) for kabushiki kaisha toshiba, Satoshi MIKOSHIBA of Yamato (JP) for kabushiki kaisha toshiba, Akihiko ONO of Kita (JP) for kabushiki kaisha toshiba
IPC Code(s): C25B1/23, C25B1/02, C25B13/02
CPC Code(s): C25B1/23
Abstract: a carbon dioxide electrolytic device of an embodiment includes: an electrolysis cell including a cathode to reduce carbon dioxide, an anode to oxidize water or hydroxide ion and having a base containing titanium, a cathode flow path to supply carbon dioxide to the cathode, an anode flow path to supply an electrolytic solution containing water to the anode, and a separator to separate the anode and the cathode; a gas supply unit to supply carbon dioxide to the cathode flow path; at least either of a humidifier to humidify carbon dioxide supplied to the cathode flow path by using a humidification water, and a liquid pouring part to add the humidification water to the carbon dioxide; and an electrolytic solution supply unit to supply the electrolytic solution to the anode flow path. at least one of the electrolytic solution, the humidification water, and the supplied gas contains an oxidant.
Inventor(s): Yusuke KOFUJI of Yokohama (JP) for kabushiki kaisha toshiba, Naoya FUJIWARA of Toshima (JP) for kabushiki kaisha toshiba, Satoshi MIKOSHIBA of Yamato (JP) for kabushiki kaisha toshiba, Ryota KITAGAWA of Setagaya (JP) for kabushiki kaisha toshiba
IPC Code(s): C25B3/26, C25B1/04, C25B9/23, C25B15/027, C25B15/029, C25B15/08
CPC Code(s): C25B3/26
Abstract: a carbon dioxide electrolytic device of an embodiment includes: an electrolysis cell that includes a cathode, an anode, a cathode flow path, an anode flow path, and a separator; a carbon dioxide supply unit; an electrolytic solution supply unit; an electrolytic solution external flow path including a first pipe connecting the electrolytic solution supply unit to a first opening provided on one end side of the anode flow path, a second pipe connected to a second opening provided on the other end side of the anode flow path, and a third pipe connecting the electrolytic solution supply unit to the second opening of the anode flow path; and an electrolytic solution switching mechanism switching between a first flow in which the electrolytic solution flows from the first opening toward the second opening and a second flow in which the electrolytic solution flows from the second opening toward the first opening.
20240318327. ELECTROLYSIS DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Satoshi MIKOSHIBA of Yamato (JP) for kabushiki kaisha toshiba, Yuki KUDO of Yokohama (JP) for kabushiki kaisha toshiba, Akihiko ONO of Kita (JP) for kabushiki kaisha toshiba, Ryota KITAGAWA of Setagaya (JP) for kabushiki kaisha toshiba, Yusuke KOFUJI of Yokohama (JP) for kabushiki kaisha toshiba, Yasuhiro KIYOTA of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): C25B9/19, C25B1/23, C25B11/031, C25B15/08
CPC Code(s): C25B9/19
Abstract: an electrolysis device of an embodiment includes: an electrolysis cell including a a porous cathode in contact with one surface of a diaphragm, an anode in contact with the other surface of the diaphragm, a cathode flow path in contact with the porous cathode, and an anode flow path in contact with the anode; a first supply part supplying the cathode flow path with a gas containing a substance to be reduced; and a second supply part supplying the anode flow path with an electrolysis solution. the cathode flow path has a first area including a gas flow path of a continuous structure that has a first gas inlet connected to the first supply part, and a first gas outlet, and a second area including a gas flow path of an interrupted structure that has a second gas inlet connected to the first gas outlet, and a second gas outlet.
Inventor(s): Yoshitsune SUGANO of Kawasaki (JP) for kabushiki kaisha toshiba, Jun TAMURA of Chuo (JP) for kabushiki kaisha toshiba, Akihiko ONO of Kita (JP) for kabushiki kaisha toshiba
IPC Code(s): C25B9/30, C25B1/04, C25B1/23, C25B1/27, C25B9/015, C25B9/70, C25B15/08
CPC Code(s): C25B9/30
Abstract: an electrolysis system includes: an electrolysis cell having an anode to oxidize an oxidizable material to produce an anode product, a cathode to reduce a reducible material to produce a cathode product, a diaphragm between the anode and the cathode, a first flow path plate having an anode flow path facing on the anode and through which an anode fluid containing the oxidizable material flows, and a second flow path plate having a cathode flow path facing on the cathode and through which a cathode fluid containing the reducible material flows, the anode, the cathode, the diaphragm, the first flow path, and the second flow path being stacked in a first direction; a rotary shaft disposed on the opposite side of the cathode from the diaphragm and extending along a second direction; and a driving device to rotate the electrolysis cell around the rotary shaft.
Inventor(s): Takashi USUI of Saitama Saitama (JP) for kabushiki kaisha toshiba, Hidefumi TAKAMINE of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba, Kazuo WATABE of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01M5/00, G01R33/02
CPC Code(s): G01M5/0066
Abstract: according to one embodiment, a structure evaluation system according to an embodiment includes a plurality of first sensors, one or more second sensors, a vehicle information estimator, and an evaluator. the plurality of first sensors detect elastic waves generated from the inside of a structure on which a vehicle travels. the one or more second sensors detect passage of the vehicle without depending on damage in the structure. the vehicle information estimator estimates vehicle information including at least information of the number of vehicles passing on the structure on the basis of detection results from the one or more second sensors. the evaluator evaluates a deterioration state of the structure on the basis of a plurality of elastic waves detected by the plurality of first sensors and the vehicle information estimated by the vehicle information estimator.
Inventor(s): Hiroshi OHNO of Tokyo (JP) for kabushiki kaisha toshiba, Hiroya KANO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takahiro KAMIKAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hideaki OKANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Sayuri SUZUKI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Chisa HIRAKAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Akifumi OHNO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yoshiaki TAKAGI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01N21/25
CPC Code(s): G01N21/255
Abstract: according to an embodiment, an optical inspection method includes: causing a wavelength selection portion to selectively pass light components including at least two different wavelength spectra from an object point and causing an imaging portion including at least two color channels configured to receive the light components of the wavelength spectra to capture the object point; defining the light components of the at least two different wavelength spectra as signal vectors having different directions based on light reception data in the at least two color channels for the object point; and estimating spread of a direction distribution of light at the object point based on the directions of the signal vectors.
Inventor(s): Hiroshi OHNO of Tokyo (JP) for kabushiki kaisha toshiba, Kenta TAKANASHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hiroya KANO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hideaki OKANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01N21/88
CPC Code(s): G01N21/8806
Abstract: according to the embodiment, an optical inspection apparatus includes a single-pixel light receiving element, an image formation optical element, and a light beam selection portion. the image formation optical element is disposed at a position where the single-pixel light receiving element configured to receive image points corresponding to at least two different object points of an object. the light beam selection portion is provided between the image formation optical element and the single-pixel light receiving element and is configured to selectively shield at least one wavelength included in lights from the object points.
Inventor(s): Hiroshi OHNO of Tokyo (JP) for kabushiki kaisha toshiba, Hideaki OKANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kenta TAKANASHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takahiro KAMIKAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hiroya KANO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01N21/956, G01N21/88
CPC Code(s): G01N21/95607
Abstract: according to one embodiment, an optical inspection method includes projecting first pattern light in a first basic modulation mode that periodically changes in bright and dark, onto an object, acquiring a first image by capturing an image of the object onto which the first pattern light has been projected, projecting second pattern light in a first inverted modulation mode in which bright and dark are inverted with respect to the first basic modulation mode, onto the object, acquiring a second image by capturing an image of the object onto which the second pattern light has been projected, and generating a singular light-scattered image in which a singular region including uniquely-scattered light that is extracted based at least on the first image and the second image is intensified.
20240319139. CHEMICAL SENSOR SYSTEM_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yoshiaki SUGIZAKI of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01N29/036, G01N27/00
CPC Code(s): G01N29/036
Abstract: a chemical sensor system includes a chemical sensor including a sensor element and a probe molecule located on a surface of the sensor element; a collection unit for a sample atmosphere; a humidification device configured to generate a humidification fluid having a humidity higher than a humidity of the sample atmosphere; a switching mechanism connected to the collection unit, the humidification device, and the chemical sensor, the switching mechanism configured to switch between a state in which the sample atmosphere is supplied to the surface of the sensor element and a state in which the humidification fluid is supplied to the surface of the sensor element; and a cooling mechanism configured to cool the sensor element.
20240319215. INSPECTION SYSTEM AND INSPECTION METHOD_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Ryota SEKIYA of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01N35/00
CPC Code(s): G01N35/00603
Abstract: according to one embodiment, an inspection system includes a first measurement unit for measuring a target, a first determination unit for making a first determination on whether the target includes a predetermined object using a first machine learning model based on a measurement result by the first measurement unit, a second measurement unit for measuring the target, a second determination unit for making a second determination on whether the target includes the predetermined object based on a measurement result by the second measurement unit, and a processing unit for generating first update data of the first machine learning model based on the second determination.
Inventor(s): Koji SASAKI of Inagi Tokyo (JP) for kabushiki kaisha toshiba, Takahiro KASE of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takenori KOBAYASHI of Meguro Tokyo (JP) for kabushiki kaisha toshiba, Kenji MITSUMOTO of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Yoshihisa SUMIDA of Nakano Tokyo (JP) for kabushiki kaisha toshiba, Koji TOBA of Tama Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G01R31/392, G01R31/36, G01R31/382, H01M10/42, H01M10/48, H02J7/00
CPC Code(s): G01R31/392
Abstract: a storage battery management device according to the present embodiment includes a processor functioning as an acquisition unit, a deterioration prediction unit, a calculation unit, and a display control unit. the acquisition unit acquires parameters including charge/discharge power, a charge/discharge capacity, and soc of the storage battery system of a storage battery system. the deterioration prediction unit predicts deterioration of the storage battery system on the basis of the acquired parameters. the calculation unit performs calculation relating to deterioration by multiple patterns with respect to one or more of parameters including the charge/discharge power, a c rate indicating a charging/discharging speed, etc., on the basis of a digital model and the predicted deterioration. the calculation unit specifies a pattern whose life extension effect is relatively high. the display control unit causes a display device to display the one or more parameters of the specified pattern.
Inventor(s): Kenta TAKANASHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hiroya KANO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hiroshi OHNO of Tokyo (JP) for kabushiki kaisha toshiba, Hideaki OKANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G02B21/00, G02B21/12, G02B21/36
CPC Code(s): G02B21/0032
Abstract: according to the embodiment, an optical measurement method includes: forming an object image including at least a part of the object by a bright-field optical system, and capturing and acquiring object image data by an imaging element configured to distinguish spectrums including first and second wavelengths by each pixel; performing dark-field conversions for the first wavelength to obtain first converted image data and for the second wavelength to obtain second converted image data, based on the object image data; performing hue generation processing of generating hue image data based on the first and second converted image data; and estimating information regarding a physical property of the object based on the hue image data.
Inventor(s): Yoshikazu HANATANI of Komae Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F17/16
CPC Code(s): G06F17/16
Abstract: according to an embodiment, an information processing method is executed by a computer. the method includes generating processed data obtained by performing, on original data including a group of a plurality of data values arranged respectively at position coordinates along a predetermined direction on a map, at least one of an addition process of adding a predetermined data value representing an analysis target at position coordinates in a non-analysis target region in the original data and a deletion process of deleting data values of at least part of the position coordinates in the original data, where data values at the at least part match between a plurality of pieces of the original data.
Inventor(s): Yoshikazu HANATANI of Komae Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F18/22
CPC Code(s): G06F18/22
Abstract: according to an embodiment, an information processing method is executed by a computer. the method includes generating processed data obtained by processing original data including a group of a plurality of data values arranged respectively at position coordinates along a predetermined direction on a map, using a processing pattern in which a processing rule of the original data is defined for each position coordinate on the map.
Inventor(s): Nobuaki SUZUKI of Ota Tokyo (JP) for kabushiki kaisha toshiba, Yuichi KOMANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Aki FUKUDA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F21/32, G06F21/44
CPC Code(s): G06F21/32
Abstract: according to one embodiment, a biometric authentication system includes a biometric authentication device and an information processing device. the biometric authentication device includes a first secure element configured to store data related to biometric information and data related to a first security level, and a first authenticator configured to perform authentication of a user based on the biometric information and perform authentication of the information processing device based on a second security level. the information processing device includes a second secure element configured to store data related to the second security level, and a second authenticator configured to perform authentication of the biometric authentication device based on the first security level.
Inventor(s): Takao MARUKAME of Chuo Tokyo (JP) for kabushiki kaisha toshiba, Kumiko NOMURA of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba, Koichi MIZUSHIMA of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba, Yoshifumi NISHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06N3/044, G06N3/049
CPC Code(s): G06N3/044
Abstract: according to an embodiment, an anomaly detection device includes an input device, an output device, and a determination device. the input device acquires a time-series input signal detected by observing an observation target device. the output device generates a plurality of multiplication signals by respectively multiplying a plurality of output signals each having a waveform having reproducibility for a waveform of the input signal, by output weights set in advance, and generates an integral signal obtained by time integration through adding up the plurality of multiplication signals. the determination device determines whether the observation target device is normal or abnormal based on a result of comparison between the integral signal and a threshold set in advance, and output a determination signal representing a determination result. the output weights each represent a positive predetermined value or a negative predetermined value, and are respectively set for the plurality of output signals.
Inventor(s): Yasutaka NISHIDA of Tama Tokyo (JP) for kabushiki kaisha toshiba, Fumihiko AIGA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06N10/60
CPC Code(s): G06N10/60
Abstract: a quantum circuitry learning method comprising: reading an optimized parameter �* assigned to a parameterized quantum circuitry u(�*) of a trained first hqcnn, the first hqcnn being trained based on a first data set regarding classical data b; transferring the parameter �* to a second feature extraction circuitry f (b, �*) included in a second hqcnn; training the second hqcnn based on a second data set regarding the classical data b while fixing the parameter �*, and optimizing a second parameter � of a parameterized quantum circuitry u(�) of the second hqcnn.
Inventor(s): Topon PAUL of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06N20/00
CPC Code(s): G06N20/00
Abstract: an information processing apparatus comprising processing circuitry, the processing circuitry inputs first learning data including time-series data to a first model and calculate a forecasted value of a target variable that is a forecasting target, calculates a first forecasting residual amount that is a deviation of the forecasted value by using second learning data; and constructs a second model for predicting the first forecasting residual amount by machine learning based on the second learning data and the first forecasting residual amount.
Inventor(s): Ryoko HATAKEYAMA of Arakawa Tokyo (JP) for kabushiki kaisha toshiba, Shizu SAKAKIBARA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takufumi YOSHIDA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Hideyuki AISU of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06Q10/0835
CPC Code(s): G06Q10/08355
Abstract: according to one embodiment, an information processing apparatus includes a processor. the processor is configured to create, by replacing a plurality of facilities with some of the plurality of facilities in a facility planning problem for creating a facility plan for operating any facility selected from the plurality of facilities, a partial problem of the facility planning problem, create a condition to be applied to the facility planning problem based on a solution to the created partial problem, and create the facility plan by seeking to solve a facility planning problem to which the created condition is added.
Inventor(s): Seiji TOKURA of Kawasaki (JP) for kabushiki kaisha toshiba, Kazuhide SAWA of Kawasaki (JP) for kabushiki kaisha toshiba, Akihito OGAWA of Fujisawa (JP) for kabushiki kaisha toshiba, Kazunobu KONDA of Suginami (JP) for kabushiki kaisha toshiba
IPC Code(s): G06Q10/087
CPC Code(s): G06Q10/087
Abstract: according to an embodiment, a handling system that handles an object is provided. the handling system has a holding unit, a storage unit, and a processing unit. the holding unit holds the object. the storage unit stores operation setting information and operation history information. the operation setting information associates first information entailed in the holding operation in which the holding unit holds the object, with second information including an operation setting for operating the holding unit. the operation history information includes operation records of the holding unit. the processing unit controls an operation of the holding unit on the basis of the operation setting information. the processing unit updates the operation history information on the basis of operation records of the operation. the processing unit determines whether to update the operation setting information on the basis of the updated operation history information.
Inventor(s): Osamu YAMAGUCHI of Yokohama (JP) for kabushiki kaisha toshiba, Hiroo SAITO of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): G07C9/15, G06T7/70, G06V40/16, G07C9/25
CPC Code(s): G07C9/15
Abstract: according to one embodiment, a method includes acquiring id information read from a medium at a passage zone, identifying a passerby facial image and an accompanier facial image from a captured image of the passage zone, wherein a facial image area of a first user carrying the medium is identified as one of the passerby facial image and the accompanier facial image, and a facial image area of a second user accompanying the first user is identified as the other one of the passerby facial image and the accompanier facial image, and authenticating the first and second users as passage permitted persons if at least one of the passerby facial image and the accompanier facial image matches a correct facial image corresponding to the id information.
20240321292. DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yuki SATO of Ota Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/012, G11B5/02, G11B5/105, G11B5/48, G11B5/55
CPC Code(s): G11B5/012
Abstract: according to one embodiment, a disk device includes a magnetic disk, a magnetic head, a suspension, a ramp mechanism, a housing, and a screw. the suspension holds the magnetic head and moves between a load position and an unload position. the ramp mechanism includes a ramp member that holds the suspension at the unload position, and a cylindrical member with a through hole, being fixed to the ramp member. the housing includes a first support surface with a screw hole supporting the cylindrical member. the screw includes a screw head and a screw shaft fitted into the screw hole through the through hole. the screw holds the cylindrical member between the screw head and the first support surface. a contact area between the cylindrical member and the housing is set to larger than a contact area between the cylindrical member and the screw head.
20240321293. MAGNETIC RECORDING/REPRODUCING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takuya MATSUMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/02
CPC Code(s): G11B5/02
Abstract: a magnetic recording/reproducing device includes a magnetic recording medium, a plurality of assisted magnetic recording heads, and a processor configured to write data onto the magnetic recording medium according to a first type of magnetic recording or a second type of magnetic recording and select one of the assisted magnetic recording heads for recording based on at least one of assist power and application time of the assist power when assisted magnetic recording is performed.
Inventor(s): Masaki HONDA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/455
CPC Code(s): G11B5/455
Abstract: according to one embodiment, a magnetic head inspection method includes variably setting, according to a relationship between a characteristic value indicating a characteristic of an inspected magnetic head and a target moving average value of the characteristic value, a threshold of the characteristic value used for inspection in a range of upper and lower limits.
20240321298. DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yusuke NOJIMA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takuma KIDO of Mitaka Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/48
CPC Code(s): G11B5/4833
Abstract: according to one embodiment, a disk device includes a load beam, a first protrusion, a flexure, a slider, and a second element. the first protrusion protrudes from the load beam away from a rotation axis in a first direction. the flexure includes a mounting part supported by the first protrusion. the slider is mounted on the mounting part, and includes a first element that reads and writes information from and to a magnetic disk, and a floating surface facing the magnetic disk. the second element is attached to the slider apart from a geometric center of the floating surface in the first direction. on a projection plane as viewed in a direction orthogonal to the floating surface, a contact position between the first protrusion and the mounting part is located between a geometric center of the slider and a center of gravity of the second element.
20240321299. HEAD SUSPENSION ASSEMBLY AND DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kenichiro AOKI of Machida Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/48
CPC Code(s): G11B5/486
Abstract: according to one embodiment, a head suspension assembly includes a support plate, a wiring member on the support plate, and a magnetic head mounted on the wiring member. the magnetic head includes a slider, a head element, connection pads, and a laser oscillation element on the slider. the wiring member includes a plurality of first connection terminals each having a bonding surface bonded to a connection pad of the slider and a second connection terminal including a bonding surface bonded to a connection pad of the laser oscillation element and a non-bonding surface opposite to the bonding surface. the wiring member includes a cover layer covering at least a part of the non-bonding surface of the second connection terminal.
Inventor(s): Yuki NISHIDA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/55, G11B5/31
CPC Code(s): G11B5/5508
Abstract: a magnetic disk device includes a disk, a head, and a control circuit. when writing data to a target range of a target track, the control circuit calculates an off-track amount based on the use information indicating use states of each of the first adjacent track and the second adjacent track, positions the head according to the calculated off-track amount, and writes data in the target range with the head positioned according to the calculated off-track amount.
20240321304. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takuji MATSUZAWA of Kashiwa Chiba (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/596
CPC Code(s): G11B5/59688
Abstract: according to one embodiment, a magnetic disk device includes a loop shaping filter by a digital filter, which is disposed in parallel to a controller, having a peak at certain frequency, and coefficients of which are determined by a sensitivity function and a controlled object, wherein the coefficients of the loop shaping filter of the digital filter based on a change in a sampling period of servo information.
Inventor(s): Masaya OHTAKE of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba, Kaori KIMURA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/60, G11B5/40
CPC Code(s): G11B5/6011
Abstract: a magnetic recording and reproducing device includes a magnetic recording medium including a protective layer that is exposed to an enclosed interior volume of the magnetic recording and reproducing device, which contains oxygen and helium, a magnetic head including a heat assist element that is also exposed to the enclosed interior volume, the magnetic head configured to record data onto the magnetic recording medium, and an oxygen amount measurement unit configured to measure an oxygen amount in the enclosed interior volume.
20240321307. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Toru WATANABE of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/60
CPC Code(s): G11B5/607
Abstract: according to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head that includes a write head configured to write data to the magnetic disk, a read head configured to read data from the magnetic disk, and a heater configured to adjust a flying height of the write head, and a controller that includes a first detection unit configured to detect the flying height of the write head, a second detection unit configured to detect a positioning error of the magnetic head with respect to a track of the magnetic disk, and a memory configured to store a first threshold and a second threshold.
20240321308. DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Toru Watanabe of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B5/60
CPC Code(s): G11B5/607
Abstract: according to one embodiment, a disk device includes a disk-shaped recording medium, a magnetic head including a write head, a read head, and a heater, and a controller including a reference signal generator outputting a reference signal having a constant voltage amplitude at the same frequency as a high-frequency component of a gap measurement signal recorded in the recording medium, a measurer measuring a component amplitude of a reproduced signal of the gap measurement signal and an amplitude of the reference signal, and a heater controller controlling a power value of heater power supplied to the heater based on the measured values of the component amplitude and the amplitude of the reference signal.
Inventor(s): Yukio Urata of Sagamihara Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B20/10
CPC Code(s): G11B20/10388
Abstract: according to one embodiment, a magnetic disk device includes a disk, a head, a storage unit, and a controller. the storage unit stores a reference table and an adjustment table. the reference table has a plurality of reference counts, which are m reference counts. the adjustment table has a plurality of adjustment values, which are n adjustment values. the controller includes a detector, an adjustment unit that adjusts a reference count corresponding to a case where abnormality information is detected to an ati rewrite count having a numerical value different from the reference count, a counter, a determination unit, and a refresh processing unit.
Inventor(s): Kaori KIMURA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takuya MATSUMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B20/10, G11B5/02
CPC Code(s): G11B20/10481
Abstract: a magnetic recording and reproducing device includes a magnetic recording medium having a lubricant on a surface of the magnetic recording medium, a heat-assisted magnetic recording head configured to perform magnetic recording on the magnetic recording medium, a humidity sensor, and a write procedure control circuit configured to control a write procedure of the heat-assisted magnetic recording head in accordance with a measurement result of the humidity sensor.
20240321313. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kana FURUHASHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yosuke KONDO of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B20/18
CPC Code(s): G11B20/1833
Abstract: according to one embodiment, a magnetic disk device includes a read control system that extracts scrambled data from media data read from a medium and inspection data associated with a seed value at the time of write, generates inspection data for data extracted from the media data, obtains from the inspection data and inspection data extracted from the media data, a seed value associated with both, compares this seed value with the seed value expected by the controller, and evaluates, when the comparison result is a mismatch, the data as an error, whereas when match, descrambles the data extracted from the media data using the seed value.
Inventor(s): Takahiro KAWAI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Tetsuo KURIBAYASHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B20/18, G11B5/012, G11B5/09
CPC Code(s): G11B20/1889
Abstract: according to one embodiment, a magnetic disk device includes a disk, a storage section, a first determination unit, and a first parity management unit. the first determination unit determines presence or absence of an unexecuted command. the first parity management unit searches the storage section for the first parity area after the first determination unit determines that there is no unexecuted command. the first parity management unit generates the first parity based on the first data in the first data area if the first parity area is detected as the invalid parity area, and writes the first parity to the first parity area.
20240321322. DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yuki KAWAMITSU of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G11B33/12, G11B19/20
CPC Code(s): G11B33/128
Abstract: a disk device according to one embodiment includes magnetic disks, a spindle motor, a housing, a first board, and a first connector. the magnetic disks are arranged in an axial direction. the spindle motor rotates the magnetic disks about a first rotation axis. the magnetic disks and the spindle motor are accommodated in an inner space in the housing. the housing includes a first wall having the spindle motor attached thereto, and a second wall protruding from the first wall to surround the inner space. the first board is attached to an outer surface of the second wall. the first connector is attached to the first board and is connected to an external device. each of the magnetic disks has a diameter of 80 mm or more and 100 mm or less. the housing has a maximum dimension of 26.2 mm or more in the axial direction.
Inventor(s): Tomohiro YAMASHITA of Minato Tokyo (JP) for kabushiki kaisha toshiba, Hirotaka ISHII of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba, Tomoko EGUCHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01B12/06, C04B35/45
CPC Code(s): H01B12/06
Abstract: a superconducting wire according to an embodiment includes: a substrate; a first region provided on the substrate and containing a first rare earth element, ba, cu, and o; a second region provided on the substrate and containing a second rare earth element, ba, cu, and o; and a third region provided on the substrate, provided between the first region and the second region, and containing a third rare earth element, pr, ba, cu, and o. a surface density of particles having an aspect ratio of 3 or more present on a surface of the third region is larger than a surface density of particles having an aspect ratio of 3 or more present on surfaces of the first region and the second region.
Inventor(s): Tomohiro SAITO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01J37/12
CPC Code(s): H01J37/12
Abstract: according to one embodiment, an electronic device includes a substrate, an electrode, and a facing portion. the substrate has a through hole. the electrode is provided in the through hole in the substrate and extends along an axial direction of the through hole. the facing portion is provided on the substrate, is disposed at a position closer to a center of the through hole in a width direction than is the electrode, and faces, in the width direction, a portion of the electrode on one end side in the axial direction.
20240321545. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hiroko NAKAMURA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01J37/147
CPC Code(s): H01J37/1472
Abstract: a semiconductor device includes: a first chip having a first substrate surface, a second substrate surface provided on a side opposite to the first substrate surface, and a plurality of first through holes, a plurality of charged particle beams passing through the first through holes; a second chip provided on the first chip and having a third substrate surface facing the second substrate surface, a fourth substrate surface, and a plurality of second through holes provided on the first through holes, the charged particle beams passing through the second through holes; a plurality of first electrodes provided on the first substrate surface so as to be adjacent to the first through holes; a plurality of second electrodes provided on the first substrate surface; a plurality of third electrodes provided on the fourth substrate surface so as to be adjacent to the second through holes; and a plurality of fourth electrodes provided on the fourth substrate surface, wherein the first electrodes are a first pair of electrodes for deflecting the charged particle beams, the third electrodes are a second pair of electrodes for deflecting the charged particle beams, the second electrode and the fourth electrode are an additional electrode pattern other than the first pair of electrodes and the second pair of electrodes for deflecting the charged particle beams, and an electrode pattern formed by the first electrode and the second electrode on the first substrate surface and an electrode pattern formed by the third electrode and the fourth electrode on the fourth substrate surface are not symmetrical with respect to opposite substrate surfaces of the two chips.
Inventor(s): Shinsuke KOZUMI of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L21/67, B32B43/00
CPC Code(s): H01L21/67132
Abstract: a heat stamp according an embodiment is the heat stamp used for releasing a protective tape from a substrate, the substrate including a first substrate surface, a second substrate surface provided opposite to the first substrate surface, the protective tape pasted on the second substrate surface, and a release tape having a strip-like configuration, the release tape being pasted on the protective tape from above a fifth end of the second substrate surface to above a sixth end of the second substrate surface, the fifth end and the sixth end facing each other across the center of the second substrate surface, the heat stamp including: a bottom surface having a first side, the first side being provided on a side of a releasing direction of the release tape, the releasing direction being parallel to a longitudinal direction of the strip-like configuration.
Inventor(s): Takeyuki SUZUKI of Kaga Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L21/78, H01L21/683
CPC Code(s): H01L21/78
Abstract: a method of manufacturing a semiconductor device according to an embodiment includes: the method of manufacturing a semiconductor device from a substrate and a sheet, the substrate including a semiconductor substrate including a first part including a first surface and a second surface provided on the opposite side of the first surface, and an annular second part surrounding the second surface and protruding from the second surface in a direction perpendicular to the second surface, and a first conductive film provided in contact with a top surface and an inner side surface of the second part, and the second surface, the sheet being attached to the first conductive film provided in contact with the top surface and the inner side surface of the second part, and the second surface; the method comprising: separating the second part from the first part by pressing a polishing tape against the first surface provided on the opposite side of the second part and polishing the semiconductor substrate; and cutting the first conductive film between the first part and the separated second part by pressing the polishing tape against the first conductive film between the first part and the separated second part.
Inventor(s): Yutaka ONOZUKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Tomohiro SAITO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kazuyuki HIGASHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kazumichi TSUMURA of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/31, H01L23/00, H01L23/13, H01L23/498, H05K1/18
CPC Code(s): H01L23/3121
Abstract: an electronic component includes: a first substrate having a first surface with a first region and a second region, a plurality of first bumps provided in the first region, and zero or one or more second bumps provided in the second region, the number of second bumps being smaller than the number of first bumps; and a second substrate having a second surface with a third region facing the first surface and the first region and a fourth region facing the second region, a plurality of third bumps provided in the third region and in contact with the first bumps, zero or one or more fourth bumps provided in the fourth region and in contact with the second bumps, a third surface provided on a side opposite to the third region and having a first distance from the second surface, and a fourth surface provided on a side opposite to the fourth region and having a second distance from the second surface shorter than the first distance, the number of fourth bumps being smaller than the number of third bumps.
Inventor(s): Fumiyoshi KAWASHIRO of Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/31, H01L23/00, H01L23/29, H01L25/16
CPC Code(s): H01L23/3135
Abstract: according to one embodiment, a semiconductor device includes a semiconductor chip, drain, source and gate electrodes, mold layers and first and second coating films. the semiconductor chip has a drain region on a first surface, and source and gate regions on a second surface facing the first surface. the drain electrode is provided on the drain region. the source electrode is provided on the source region. the gate electrode is provided on the gate region. the mold layers are provided on side surfaces of the semiconductor chip, the source and gate electrodes. the first coating films are provided on a lower surface and side surfaces of the drain electrode, an upper surface of the source electrode, and an upper surface of the gate electrode. the second coating films are provided on an upper surface and side surfaces of the mold layers.
20240321696. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Riku KATAMAWARI of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba, Hideharu KOJIMA of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Takeyuki SUZUKI of Kaga Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/495, H01L23/00
CPC Code(s): H01L23/49562
Abstract: a semiconductor device according to the present embodiment includes a lead frame and a semiconductor chip. the lead frame includes a frame main surface and a frame convex portion provided on the frame main surface. the semiconductor chip includes a semiconductor layer and an electrode provided on a bottom surface of the semiconductor layer and bonded to the frame convex portion. the electrode of the semiconductor chip has a protrusion surrounding the frame convex portion, and an outer side surface of the protrusion is flush with a side surface of the semiconductor layer.
20240321697. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Toru SHONO of Himeji Hyogo (JP) for kabushiki kaisha toshiba, Naoya NISHIJIMA of Ibo Hyogo (JP) for kabushiki kaisha toshiba, Koji ONISHI of Ibo Hyogo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/495, H01L23/00, H01L29/78
CPC Code(s): H01L23/49562
Abstract: an embodiment includes a semiconductor portion, a first electrode, a second electrode, a first control electrode, a second control electrode, a conductive plate, and a bonding material. the first electrode, the second electrode, the first control electrode, and the second control electrode are provided above the semiconductor portion. the conductive plate is provided below the semiconductor portion. the bonding material is provided between the semiconductor portion and the conductive plate. a thin portion is thinner than a mounting portion. in a plan view, the semiconductor portion and the conductive plate are rectangular, and the conductive plate includes the mounting portion on which the semiconductor portion is mounted and the thin portion surrounding the mounting portion. vertices of the semiconductor portion are located in the thin portion.
Inventor(s): Kazuya NISHIHORI of Shibuya Tokyo (JP) for kabushiki kaisha toshiba, Keita MASUDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takahiro NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Akihiro IMADA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00, H01L23/58, H01L27/12
CPC Code(s): H01L23/562
Abstract: according to the present embodiment, a semiconductor device includes a semiconductor substrate, a circuit element, a first wiring layer, and an element protection member. the circuit element is formed on an upper surface side of the semiconductor substrate and includes at least one switching element. the first wiring layer includes a plurality of first wires electrically connected to the circuit element and is provided above the semiconductor substrate via a first interlayer dielectric film. the element protection member extends along an upper surface of the semiconductor substrate to discontinuously surround the circuit element with a conductive member. a first wire insulation film between the first wires in the first wiring layer is formed by an oxide insulation film with a dielectric constant of 3.5 or more.
Inventor(s): Kei OBARA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Kazumichi TSUMURA of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/58, H01L21/3065, H01L21/3213
CPC Code(s): H01L23/585
Abstract: a width of a first through hole is greater than a width of a second through hole in a direction orthogonal to a first direction. the first through hole also extends to a part of an interconnection portion in the first direction. a side surface of the first through hole includes a first side surface portion positioned on a substrate and a second side surface portion positioned on the part of the interconnection portion. the interconnection portion includes a third face facing a first face of the substrate, a fourth face positioned on an opposite side with respect to the third face in the first direction, and a fifth face. the fifth face is continuous with the second side surface portion of the first through hole and a side surface of a conductive film, and includes an end surface of the conductive film in the first direction.
20240321789. BONDING-TYPE INTERCONNECTION MEMBER_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kazuyuki HIGASHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kei OBARA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Kazumichi TSUMURA of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00, H01L25/065
CPC Code(s): H01L24/05
Abstract: a bonding-type interconnection member includes a first substrate; a first interconnection portion stacked on the first substrate and including a first insulating layer, a first interconnection layer, and a first connection hole reaching the first interconnection layer; a second substrate facing the first interconnection portion in a first direction; a bonding metal portion provided between the first connection hole and the second substrate; a first conductive film provided in the first connection hole and in contact with the first interconnection layer on a bottom surface of the first connection hole; and a second conductive film provided between the first conductive film and the bonding metal portion, and in contact with the first conductive film and the bonding metal portion. the first conductive film is made of a material different from a material of the second conductive film and a material of the bonding metal portion.
20240321790. BONDING-TYPE INTERCONNECTION MEMBER_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kei OBARA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Kazumichi TSUMURA of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00, H01L25/065
CPC Code(s): H01L24/05
Abstract: a bonding-type interconnection member includes a first substrate having a first through hole extending in a first direction; a second substrate having a second through hole extending in the first direction; an interconnection portion stacked on at least one of the first substrate and the second substrate, and having a through hole continuous with the first through hole and the second through hole; a conductive film provided on a side surface of the through hole of the interconnection portion; at least two bonding metal portions positioned between the first substrate and the second substrate, and bonding the first substrate and the second substrate; and a foundation metal film provided between the bonding metal portions and the interconnection portion. the conductive film is made of a material different from a material of the bonding metal portions and a material of the foundation metal film.
Inventor(s): Yoshiaki SHIMOOKA of Sagamihara Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00
CPC Code(s): H01L24/14
Abstract: according to one embodiment, a semiconductor device includes a semiconductor substrate and an array portion. the array portion includes a plurality of metal portions arranged on the semiconductor substrate. when a virtual quadrilateral circumscribing minimally a contour shape of the array portion on the semiconductor substrate is set, the contour shape of the array portion does not overlap each of four vertices of the virtual quadrilateral.
20240321808. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kazuki MATSUO of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba, Masatoshi ARAI of Hakusan Ishikawa (JP) for kabushiki kaisha toshiba, Rie FUJIMOTO of Komatsu Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00
CPC Code(s): H01L24/32
Abstract: a semiconductor chip according to an embodiment includes a metallic film provided on a semiconductor chip; an insulating film provided on the metallic film and having an opening; a bonding material provided on the metal film in the opening, and the bonding material being bonded to the metallic film; and a connector including a bonding surface bonded to the bonding material, and an annular groove provided on the bonding surface, the annular groove being along the periphery of the bonding surface, and an inner diameter of the annular groove being 60% or more and 90% or less of an outer diameter of the annular groove.
20240321812. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takeshi MURASAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00, H01L23/64
CPC Code(s): H01L24/48
Abstract: according to the present embodiment, a semiconductor device includes a substrate, a semiconductor chip, and a capacitor. the substrate includes at least a grounding terminal and is at the same potential as the grounding terminal. the semiconductor chip is arranged on the substrate and connected to the grounding terminal via a first bonding wire, and includes a circuit driven with a predetermined clock frequency and an analog circuit. the capacitor is arranged on the substrate and connected to at least either the circuit or the analog circuit at one end via a connection wire.
20240321813. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Syotaro ONO of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Hisao ICHIJO of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Hiroaki YAMASHITA of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/00, H01L23/495
CPC Code(s): H01L24/73
Abstract: a semiconductor device according to an embodiment includes: a die pad including an upper surface; a semiconductor chip provided on the upper surface, the semiconductor chip including a rectangular shape, and the semiconductor chip including an element region, and a termination region surrounding the element region; a first electrode provided on the semiconductor chip; a second electrode provided on the semiconductor chip; a first connector provided above the termination region, the first connector including a portion covering each of the four sides of the rectangular shape when viewed from above, and the first connector being electrically connected to the first electrode; and a sealing resin sealing a periphery of the semiconductor chip and the first connector.
20240321850. ISOLATOR_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yusuke IMAIZUMI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Jia LIU of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yoshinari TAMURA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L25/18, H01L23/00, H01L23/495
CPC Code(s): H01L25/18
Abstract: according to one embodiment, an isolator includes an isolator module including a first substrate, a first insulating layer in contact with a top surface of the first substrate, a second insulating layer in contact with a bottom surface of the first substrate, a first coil arranged at a same height as the first insulating layer, and a second coil arranged at a same height as the second insulating layer and facing the first coil; a first conductor arranged below the isolator module and electrically connected to a bottom surface of the second coil; and a first chip, wherein the second coil and a top surface of the first chip are electrically connected to each other with the first conductor interposed.
20240321862. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hiroshi KONO of Himeji Hyogo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L27/02, H01L29/06, H01L29/16, H01L29/78
CPC Code(s): H01L27/0255
Abstract: a semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode, a second semiconductor layer located on a portion of the first semiconductor layer, a third semiconductor layer located on a first portion of the second semiconductor layer, a fourth semiconductor layer located on a second portion of the second semiconductor layer, a fifth semiconductor layer located on a third portion of the second semiconductor layer, a second electrode, a third electrode connected to the third, fourth, and fifth semiconductor layers, and a metal film connected to the third electrode. a length in a second direction of the fifth semiconductor layer is greater than a length in the second direction of the fourth semiconductor layer. the second direction crosses a first direction. the first direction is from the first electrode toward the first semiconductor layer.
Inventor(s): Takayuki Hiraoka of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L27/02
CPC Code(s): H01L27/0288
Abstract: according to one embodiment, a protection circuit comprises a first power line, a second power line, a first transistor, a first resistor, a second resistor, a second transistor, and a trigger circuit. a drain of the first transistor is connected to the first power line. a source of the first transistor is connected to the second power line. a drain of the second transistor is connected to the first power line. a source of the second transistor is connected to a first node. the trigger circuit is connected to each of the first node and the second power line. the trigger circuit is configured to control the first transistor based on a voltage change of the first node.
20240321869. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kazutoshi NAKAMURA of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba, Shunta MURAI of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Daiki YOSHIKAWA of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L27/06, H01L29/06, H01L29/739, H01L29/861
CPC Code(s): H01L27/0664
Abstract: according to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first region, and a second region. the second electrode is separated from the first electrode. the first region includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a sixth semiconductor region of the first conductivity type. the fifth semiconductor region, located between the fourth semiconductor region and a portion of the third semiconductor region, has a higher first-conductivity-type impurity concentration than the third semiconductor region. the sixth semiconductor region, located between the third semiconductor region and the portion of the second electrode, has a higher first-conductivity-type impurity concentration than the third semiconductor region.
20240321871. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kazuki MINAMIKAWA of Nomi Ishikawa (JP) for kabushiki kaisha toshiba, Daiki YOSHIKAWA of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Kazutoshi NAKAMURA of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L27/07, H01L29/06, H01L29/417, H01L29/739, H01L29/872
CPC Code(s): H01L27/0727
Abstract: according to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the second conductivity type, and a second electrode. the third semiconductor region is located on the second semiconductor region, and has a higher second-conductivity-type impurity concentration than the second semiconductor region. the second electrode is located on the third semiconductor region. the second electrode includes a first part and a second part. the first part is located in the second semiconductor region. the second part is positioned on the first part, and contacts the third semiconductor region in a second direction perpendicular to a first direction from the first electrode toward the first semiconductor region. a length of the first part is greater than a length of the second part in the second direction.
20240321945. CAPACITOR_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Tatsuya OHGURO of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01G4/08, H01G4/228
CPC Code(s): H01L28/91
Abstract: according to one embodiment, a capacitor includes a semiconductor substrate, an electrode layer extending from a surface of the semiconductor substrate into the semiconductor substrate and containing a metal silicide in the semiconductor substrate, a dielectric film provided between the electrode layer and the semiconductor substrate and electrically insulating the electrode layer from the semiconductor substrate, a first terminal connected to the electrode layer, and a second terminal connected to the semiconductor substrate.
Inventor(s): Tsutomu KIYOSAWA of Himeji Hyogo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L21/784, H01L23/31, H01L23/544, H01L29/66, H01L29/78
CPC Code(s): H01L29/0657
Abstract: a semiconductor device according to embodiments includes a device region and a dicing region surrounding the device region. the device region includes a first electrode, a second electrode, and a silicon carbide layer having a first face on the side of the first electrode and a second face on the side of the second electrode. at least a portion of the silicon carbide layer is provided between the first electrode and the second electrode. the dicing region includes the silicon carbide layer having the first face and the second face. a first maximum distance from the second face to the first face of the device region in a normal direction of the second face is greater than a second maximum distance from the second face to the first face of the dicing region in the normal direction.
20240321963. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shunta MURAI of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Daiki YOSHIKAWA of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba, Kazutoshi NAKAMURA of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/06, H01L29/08, H01L29/739
CPC Code(s): H01L29/0696
Abstract: according to one embodiment, a semiconductor device includes first and second electrodes, and first and second regions. the first region includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a plurality of third semiconductor regions of the first conductivity type, a gate electrode, a conductive part, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a sixth semiconductor region of the second conductivity type. the gate electrode faces one of the plurality of third semiconductor regions via a gate insulating layer. the conductive part faces another one of the plurality of third semiconductor regions via an insulating layer, and is electrically connected with the second electrode. the fourth and six semiconductor regions are located on the one and the other one of the plurality of third semiconductor regions, respectively.
20240321967. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shunsuke ASABA of Himeji Hyogo (JP) for kabushiki kaisha toshiba, Hiroshi KONO of Himeji Hyogo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/16, H01L29/417, H01L29/78
CPC Code(s): H01L29/1608
Abstract: a semiconductor device according to an embodiment includes: a silicon carbide layer having a first face and a second face; first and second gate electrodes; a first silicon carbide region; a second silicon carbide region between the first silicon carbide region and the first face; a third silicon carbide region between the second silicon carbide region and the first face; a fourth silicon carbide region between the third silicon carbide region and the first face; a first electrode; and a second electrode. the first electrode includes a first portion, and the first portion includes a first contact face in contact with the fourth silicon carbide region, a second contact face in contact with the fourth silicon carbide region, a third contact face in contact with the fourth silicon carbide region and the third silicon carbide region, and a fourth contact face in contact with the third silicon carbide region.
20240321968. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shunsuke ASABA of Himeji Hyogo (JP) for kabushiki kaisha toshiba, Hiroshi KONO of Himeji Hyogo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/16, H01L29/10, H01L29/78
CPC Code(s): H01L29/1608
Abstract: a semiconductor device includes a silicon carbide layer having a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type, a third silicon carbide region of the second conductivity type, and a fourth silicon carbide region of the first conductivity type, first and second gate electrodes extending in a first direction and provided on a first surface of the silicon carbide layer, a first electrode on the first surface and including a first portion in contact with the third and fourth silicon carbide regions and a second portion in contact with the first silicon carbide region, and a second electrode on a second surface of the silicon carbide layer. the depth of the second silicon carbide region facing the fourth silicon carbide region is shallower than the depth of the second silicon carbide region facing the first gate electrode.
20240321969. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takuma SUZUKI of Himeji Hyogo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/16, H01L29/36
CPC Code(s): H01L29/1608
Abstract: the embodiment is a semiconductor device containing silicon carbide. the semiconductor device includes a semiconductor substrate, a first semiconductor portion, a second semiconductor portion, a third semiconductor portion, and a fourth semiconductor portion. each of the first semiconductor portion to the third semiconductor portion contains impurities having a first conductivity type, and the fourth semiconductor portion contains impurities having a second conductivity type. a carrier concentration of the second semiconductor portion is the same as or lower than a carrier concentration of the first semiconductor portion. the carrier concentration of the second semiconductor portion is the same as or higher than a carrier concentration of the third semiconductor portion. a point defect density of the second semiconductor portion is the same as or higher than a point defect density of the first semiconductor portion, and is higher than a point defect density of the third semiconductor portion.
20240321972. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Shinya SATO of Nonoichi Ishikawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/32, H01L21/22, H01L27/06, H01L29/06, H01L29/739, H01L29/861
CPC Code(s): H01L29/32
Abstract: according to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a first region, a second semiconductor region of a second conductivity type, and a second electrode. the first semiconductor region is located on the first electrode. the first region is located in the first semiconductor region. a concentration of carbon in the first region is greater than a concentration of carbon in the first semiconductor region. a concentration of a first element in the first region is greater than a concentration of the first element in the first semiconductor region. the first element is at least one selected from the group consisting of platinum, gold, iron, copper, and nickel. the second semiconductor region is located on the first semiconductor region. the second electrode is located on the second semiconductor region.
Inventor(s): Hideki SEKIGUCHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akira YOSHIOKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Toru SUGIYAMA of Musashino Tokyo (JP) for kabushiki kaisha toshiba, Yasuhiro ISOBE of Narashino Chiba (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/40, H01L29/417, H01L29/778
CPC Code(s): H01L29/404
Abstract: a semiconductor device includes first and second semiconductor layers, first to third electrodes, an insulating region and a conductive layer. the second semiconductor layer is located on the first semiconductor layer. the first electrode is located on the second semiconductor layer. the second electrode is located on the second semiconductor layer and arranged with the first electrode in a second direction. the third electrode is positioned between the first electrode and the second electrode. the insulating region is located on the second semiconductor layer. the insulating region is between the first electrode and the second electrode and next to the first electrode. the insulating region includes first and second insulating portions. the second insulating portion is positioned above the first insulating portion. the conductive layer is located between the first insulating portion and the second insulating portion. the conductive layer is electrically connected with the first electrode.
Inventor(s): Akira YOSHIOKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hitoshi KOBAYASHI of Yamato Kanagawa (JP) for kabushiki kaisha toshiba, Hideki SEKIGUCHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hung HUNG of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yasuhiro ISOBE of Narashino Chiba (JP) for kabushiki kaisha toshiba, Toru SUGIYAMA of Musashino Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/417, H01L29/20, H01L29/66, H01L29/778
CPC Code(s): H01L29/41725
Abstract: a semiconductor device includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a conductive part, an insulating part, and a third electrode. the second semiconductor layer is located on the first semiconductor layer. the first electrode is located on the second semiconductor layer. the first electrode includes an electrode part and an electrode extension part. the electrode part contacts the second semiconductor layer. the electrode extension part extends from an upper end portion of the electrode part. the conductive part is positioned between the first electrode and the second electrode. the conductive part contacts an upper surface of the second semiconductor layer and contacting the first electrode. the insulating part is located on the conductive part and is positioned between the conductive part and the electrode extension part.
20240322020. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Daiki YOSHIKAWA of Kanazawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/739, H01L29/08, H01L29/861
CPC Code(s): H01L29/7393
Abstract: according to one embodiment, a semiconductor device includes first and second electrodes, and first and second regions. the second electrode includes a contact part protruding toward the first electrode. the first region includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type including a first part and a second part, a gate electrode, a fourth semiconductor region of the first conductivity type, and a fifth semiconductor region of the second conductivity type. the third semiconductor region includes a first part and a second part. the fourth semiconductor region is arranged with the first part in a third direction. the fifth semiconductor region is located on the third semiconductor region, contacts the contact part in the second direction, and is arranged with the second part in the third direction.
20240322021. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yoko IWAKAJI of Meguro Tokyo (JP) for kabushiki kaisha toshiba, Tomoko MATSUDAI of Shibuya Tokyo (JP) for kabushiki kaisha toshiba, Ryohei GEJO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/739, H01L29/10, H01L29/861
CPC Code(s): H01L29/7397
Abstract: a semiconductor device includes a first electrode, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a second electrode, a third electrode, a first insulating film, and a third semiconductor layer of the first conductivity type. the first semiconductor layer is connected to the first electrode. the second semiconductor layer contacts the first semiconductor layer. the second electrode is connected to the second semiconductor layer. the first insulating film is located between the third electrode and the first semiconductor layer and between the third electrode and the second semiconductor layer. the third semiconductor layer is located between the first insulating film and the first semiconductor layer. the third semiconductor layer contacts the first insulating film and the first semiconductor layer. the third semiconductor layer has a higher carrier concentration than the first semiconductor layer.
Inventor(s): Hitoshi KOBAYASHI of Yamato Kanagawa (JP) for kabushiki kaisha toshiba, Masaaki ONOMURA of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Toru SUGIYAMA of Musashino Tokyo (JP) for kabushiki kaisha toshiba, Akira YOSHIOKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yasuhiro ISOBE of Narashino Chiba (JP) for kabushiki kaisha toshiba, Tetsuya OHNO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hideki SEKIGUCHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hung HUNG of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yorito KAKIUCHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/778, H01L29/20, H01L29/417, H01L29/66
CPC Code(s): H01L29/7786
Abstract: a conductor layer is positioned between a gate electrode and a drain electrode. the conductor layer contacts a nitride semiconductor layer. the conductor layer is electrically connected with the drain electrode. the drain electrode includes a first part contacting the nitride semiconductor layer, and a second part positioned further toward the conductor layer side than the first part in a first direction. an insulating film includes a portion positioned between the conductor layer and the drain electrode. the second part is located on the portion of the insulating film.
Inventor(s): Kazuki ISE of Kawasaki (JP) for kabushiki kaisha toshiba, Keigo HOSHINA of Yokohama (JP) for kabushiki kaisha toshiba, Yasuhiro HARADA of Isehara (JP) for kabushiki kaisha toshiba, Norio TAKAMI of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/485, H01M10/42
CPC Code(s): H01M4/485
Abstract: according to one embodiment, provided is an active material including a composite metal oxide containing an mo element, an nb element, and at least one element m selected from the group consisting of ti, v, ta, fe, co, mn, ni, bi, sb, as, p, cr, w, b, na, k, mg, al, ca, y and si. a crystal structure of the composite metal oxide has a non-periodic crystal structure. the active material includes the composite metal oxide as spherical particles. the spherical particles are secondary particles containing primary particles of the composite metal oxide having an average particle size from 10 nm to 300 nm, an average particle size of the secondary particles being from 1 �m to 10 �m.
Inventor(s): Keigo HOSHINA of Yokohama (JP) for kabushiki kaisha toshiba, Yoshiaki MURATA of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/485, H01M4/62, H01M10/38
CPC Code(s): H01M4/485
Abstract: in general, according to one embodiment, a battery including a positive electrode, a negative electrode, and a water-containing electrolyte is provided. the negative electrode includes a negative electrode active material-containing layer that includes a ti-containing oxide and a binder capable of containing water. also, the battery satisfies the following expression (1):
Inventor(s): Keigo HOSHINA of Yokohama (JP) for kabushiki kaisha toshiba, Yoshiaki MURATA of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/485, H01M4/62, H01M10/38
CPC Code(s): H01M4/485
Abstract:
Inventor(s): Keigo HOSHINA of Yokohama (JP) for kabushiki kaisha toshiba, Yoshiaki MURATA of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/485, H01M4/62, H01M10/38
CPC Code(s): H01M4/485
Abstract: where wdenotes a content (% by weight) of the binder capable of containing water in the negative electrode active material-containing layer, and wdenotes a content (% by weight) of the water in the electrolyte.
Inventor(s): Keigo HOSHINA of Yokohama (JP) for kabushiki kaisha toshiba, Yoshiaki MURATA of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/525, H01M4/505, H01M50/284, H01M50/296, H01M50/574
CPC Code(s): H01M4/525
Abstract: in general, according to one embodiment, a battery including a positive electrode, a negative electrode, and a water-containing electrolyte is provided. a nitrogen-containing compound is present on at least a part of a surface of a negative electrode active material-containing layer. a pore volume of a positive electrode active material-containing layer according to a mercury intrusion method is represented by vc (ml/g). a pore volume of the negative electrode active material-containing layer according to a mercury intrusion method is represented by va (ml/g). the pore volume va is 0.14 ml/g or less. the battery satisfies following expression (1):
Inventor(s): Keigo HOSHINA of Yokohama (JP) for kabushiki kaisha toshiba, Yoshiaki MURATA of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/525, H01M4/505, H01M50/284, H01M50/296, H01M50/574
CPC Code(s): H01M4/525
Abstract:
Inventor(s): Yoshiaki MURATA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Keigo HOSHINA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Norio TAKAMI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/62, H01M4/505, H01M4/525
CPC Code(s): H01M4/623
Abstract: in general, according to an embodiment, a secondary battery is provided. the secondary battery includes an aqueous electrolyte, a positive electrode, and a negative electrode. at least one of the positive electrode or the negative electrode includes a first binder. the first binder includes a fluorine-based resin and an acrylic resin.
Inventor(s): Hirofumi YASUMIISHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tetsuya SASAKAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yuiko KOITABASHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Sayaka MORIMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M4/62, B60L3/00, H01M4/36, H01M4/485, H01M10/42, H01M50/204, H01M50/249, H01M50/296
CPC Code(s): H01M4/628
Abstract: in general, according to an embodiment, an electrode is provided. the electrode includes: inorganic particles; niobium titanium oxide particles; and an inorganic particle-containing layer covering at least a part of surfaces of the niobium titanium oxide particles. an average particle size of the inorganic particles is larger than a thickness of the inorganic particle-containing layer.
Inventor(s): Yuiko KOITABASHI of Yokohama (JP) for kabushiki kaisha toshiba, Tetsuya SASAKAWA of Yokohama (JP) for kabushiki kaisha toshiba, Hirofumi YASUMIISHI of Kawasaki (JP) for kabushiki kaisha toshiba, Mitsuhiro OKI of Kawasaki (JP) for kabushiki kaisha toshiba, Sayaka MORIMOTO of Kawasaki (JP) for kabushiki kaisha toshiba
IPC Code(s): H01M10/0562, B60L7/10, H01M50/204, H01M50/574
CPC Code(s): H01M10/0562
Abstract: in general, according to one embodiment, an electrode is provided. the electrode includes an active material and a titanium-containing solid electrolyte. the active material includes a transition metal oxide. in an x-ray absorption fine structure spectrum of ti—k absorption edge for the electrode in a discharged state, a first x-ray absorption amount i at a first incident x-ray energy satisfies 0.2≤i≤0.6. in an x-ray absorption fine structure spectrum of ti—k absorption edge for anatase titanium dioxide, a second x-ray absorption amount at a second incident x-ray energy is equal to the first x-ray absorption amount i. the first incident x-ray energy is higher than the second incident x-ray energy.
20240322412. ISOLATOR_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Jia LIU of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H01P1/36
CPC Code(s): H01P1/36
Abstract: according to one embodiment, an isolator includes an isolator module, the isolator module including: a first coil and a second coil, each being helically shaped and having a central axis that extends in a first direction; and a first insulator configured to seal the first coil and the second coil, wherein the first coil and the second coil are separated from each other, and the first coil is positioned inside the second coil when viewed in the first direction.
Inventor(s): Sunao YOTSUTSUJI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tomoshi OTSUKI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ryusei SHINGAKI of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Chihiro KASAI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02J7/00, G06Q30/0273
CPC Code(s): H02J7/0048
Abstract: according to one embodiment, an information processing apparatus includes a processing circuitry which acquires information of a first connection time period during which a mobile object is connected to a charge connector among a first period, the charge connector configured to become capable of control of charge and discharge and measurement of a remaining charge amount of a storage battery included in the mobile object when the mobile object is connected to the charge connector, and acquires information on a remaining charge amount of the storage battery measured during the first connection time period, and which estimates a second connection time period during which the mobile object is connected to the charge connector among the second period and a remaining charge amount of the storage battery during the second connection time period, based on the information of the first connection time period and the information on the remaining charge amount.
20240322681. SEMICONDUCTOR CIRCUIT_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Masatoshi WATANABE of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tsuneyuki HAYASHI of Kodaira Tokyo (JP) for kabushiki kaisha toshiba, Shuuji TODA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02M3/155, H02M1/08
CPC Code(s): H02M3/155
Abstract: according to one embodiment, a semiconductor device includes: a switch circuit including a first switch configured to control an output of a first power supply voltage, and a second switch configured to control an output of a second power supply voltage, the switch circuit being configured to switch the first power supply voltage and the second power supply voltage; and a control circuit configured to receive a first control signal related to an input of the first power supply voltage, and a second control signal related to an input of the second power supply voltage, configured to detect the inputs of the first and second power supply voltages, and configured to control an operation mode of the switch circuit, based on a detection result of the first and second control signals and the first and second power supply voltages.
20240322774. AMPLIFIER CIRCUIT AND DRIVER CIRCUIT_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hiroaki SHIRATO of Sagamihara Kanagawa (JP) for kabushiki kaisha toshiba, Hiroshi YOSHINO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03F3/45, H03F1/26, H03F1/56
CPC Code(s): H03F3/45475
Abstract: according to one embodiment, an amplifier circuit is an auto-zero amplifier including a main amplifier, a null amplifier, and a capacitor connected to an output terminal of the null amplifier without interposing a switch for switching an operation mode provided at the output terminal.
Inventor(s): Takayuki TERAGUCHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/0412, H03K17/16, H03K17/693
CPC Code(s): H03K17/04123
Abstract: according to one embodiment, a high frequency semiconductor integrated circuit includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, first to fourth switch circuits. in a case where a coupling destination of the first input terminal is switched from the first output terminal to the second output terminal, a third switching operation changing the third switch circuit from an on state to an off state and a fourth switching operation changing the fourth switch circuit from the off state to the on state are finished, after a first switching operation changing the first switch circuit from the on state to the off state and a second switching operation changing the second switch circuit from the off state to the on state are finished.
Inventor(s): Tatsuya NISHIWAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/0412
CPC Code(s): H03K17/04123
Abstract: according to one embodiment, a control circuit includes a first bias terminal, a second bias terminal, an input-side terminal, a diode, a capacitor, a first transistor, a second transistor, and an output-side terminal. the first transistor includes a first control terminal configured to turn on and off electrical conduction between a third terminal and a fourth terminal. the second transistor includes a second control terminal configured to turn on and off electrical conduction between a fifth terminal and a sixth terminal. a control signal based on a signal input to the input-side terminal is input to the first control terminal and the second control terminal, and the first transistor and the second transistor are alternately turned on and alternately turned off.
20240322810. POWER SOURCE CIRCUIT_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Chen Kong TEH of Ota Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/06, H03K5/24, H03K17/08
CPC Code(s): H03K17/063
Abstract: a power source circuit according to an embodiment includes: first and second transistors connected to a current path between an input terminal and an output terminal; a first node that supplies a first control voltage to a gate of the first transistor; a comparator with a first input terminal to which a voltage supplied to the input terminal is applied and a second input terminal to which a voltage appearing at a second node being a connecting point of respective drains of the first and second transistors is applied, the comparator being configured to compare voltages of the first input terminal and the second input terminal to each other and to control the first control voltage to be supplied to the first node based on a comparison result; and a diode connected between the first input terminal and the second input terminal of the comparator.
20240322815. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Nobuyuki SHOBUDANI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/16, H03K17/687
CPC Code(s): H03K17/166
Abstract: a semiconductor device includes a charging circuit, a discharging circuit, a detection circuit, and a storage circuit. the charging circuit performs charging based on a first signal and a second signal. the discharging circuit performs discharging based on a third signal. the detection circuit outputs a fourth signal that has a level that varies based on a change in a rate of change of potential. the storage circuit receives a fifth signal and the fourth signal, stores a level of the fifth signal based on a first edge of the fourth signal, and outputs the second signal that is based on the stored level. the outputting is performed based on a second edge of the fourth signal.
Inventor(s): Bowen DANG of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Makoto ARAI of Tachikawa Tokyo (JP) for kabushiki kaisha toshiba, Shoji OOTAKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takeshi MURASAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takaya KITAHARA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/691, H02M1/34
CPC Code(s): H03K17/691
Abstract: a signal transmission circuitry is a circuitry that transmits a signal from a first system on a transmission side to a second system on a reception side. the first system includes an inductor, a first current source controlled by a first switch, a second current source connected in series with the first current source via the inductor and controlled by a second switch, a third switch connected in parallel with the first current source and controlling connection with a ground point, and a fourth switch connected in parallel with the second current source and controlling connection with the ground point.
20240322822. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yukio TSUNETSUGU of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H03K17/785
CPC Code(s): H03K17/785
Abstract: according to one embodiment, a semiconductor device includes first and second switch elements, first and second light emitting elements, first and second light receiving elements, first and second voltage control circuits, and first and second switch control circuits. the first switch control circuit is configured to cause the first light emitting element to emit light after a first time elapses after an input signal has transitioned from a first logic level to a second logic level. the second switch control circuit is configured to suspend light emission of the second light emitting element after a second time elapses after the input signal has transitioned from the second logic level to the first logic level.
20240322907. OPTICAL REPEATER DEVICE AND RELAY METHOD_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kyosuke DOBASHI of Higashimurayama Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H04B10/29, H04J14/08
CPC Code(s): H04B10/29
Abstract: an optical repeater has signal processors which detect switching between uplink and downlink signals of a first group of connected base stations. a multiplexer/demultiplexer unit is between the signal processors and a first plurality of remote wireless units. a timing comparator acquires signal switching times for the first group of base stations, calculates adjustments for synchronizing the switching transmission of a downlink signal to a remote unit based on both internal switching times and external switching times for a second group of base stations connected to another optical repeater. a monitoring controller acquires detected delay amounts for a first plurality of remote units, and calculates timing adjustments for synchronizing transmissions from the first group of remote units and another group of remote units connected to the other optical repeater based on the detected delay amounts and information from the other optical repeater.
Inventor(s): Hiroo MAKARI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H04B10/516
CPC Code(s): H04B10/516
Abstract: a serial data receiving apparatus according to an embodiment includes a detection unit and an alignment unit. the detection unit is configured to detect a specific bit arrangement in which an idle code or an end code worth of one word, and a head code worth of one word are sequentially consecutive from a bit arrangement of parallel data worth of three words converted from serial data, an alignment of which is not adjusted. the alignment unit is configured to adjust an alignment of word data based on a bit boundary of the specific bit arrangement detected.
[[20240323004. KEY MANAGER, QKDN CONTROL DEVICE, QUANTUM CRYPTOGRAPHIC COMMUNICATION SYSTEM, INFORMATION PROCESSING DEVICE, KEY MANAGEMENT METHOD, QKDN CONTROL METHOD, INFORMATION PROCESSING METHOD, AND PROGRAM PRODUCT_simplified_abstract_(kabushiki kaisha toshiba)]]
Inventor(s): Yu YU of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yoshimichi TANIZAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H04L9/08
CPC Code(s): H04L9/0855
Abstract: a key manager according to one embodiment is connected to a qkd device generating a link key by qkd, an application of a user network, and a qkdn control device. the key manager includes a communication interface and a processor. the communication interface receives, from the qkdn control device, route information for transmitting an application key to a destination key manager. the processor identifies, from the route information, a key manager that is located in a first key sharing network to which the key manager connected to the application belongs and is connected to a second key sharing network. the processor determines a route in the first key sharing network from resource information of the first key sharing network, and causes the communication interface to transmit the application key encrypted with the link key by using the route.
Inventor(s): Hideyuki TSUTSUMITAKE of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): H04N5/262, B60R1/26, G06T3/4038, G06T11/00, G06T11/60, H04N5/272, H04N7/18, H04N23/81, H04N23/90
CPC Code(s): H04N5/2628
Abstract: according to one embodiment, an image synthesis device for an electronic mirror includes a rear camera which obtains a first image from a first position, and a side camera which obtains a second image of the same direction with a view of the rear camera from a second position. the second image includes a view obstruction. when a part of the first image is connected as a complementary image to the view obstruction of the second image, an image processing device converts an image of the view obstruction into a translucent image, superimposes the complementary image on the translucent image, and obtains a third image which remains an outline of the complementary image.
20240323480. IMAGE DISPLAY SYSTEM AND METHOD_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takashi DOI of Fuchu (JP) for kabushiki kaisha toshiba
IPC Code(s): H04N21/4363, H04N21/436
CPC Code(s): H04N21/43635
Abstract: according to one embodiment, an image display system includes a source device, a sink device, and an hdmi cable that connects the source device and the sink device. the source device includes a transmitter configured to transmit a plurality of pieces of image data via the hdmi cable. the sink device includes a receiver configured to receive the transmitted plurality of pieces of image data, a storage configured to store the received plurality of pieces of image data, and a display controller configured to execute display control processing of repeatedly displaying the plurality of pieces of image data stored in the storage. the transmitter does not transmit image data while the display control processing is being executed.
Inventor(s): Akihiko ENAMITO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takahiro HIRUMA of Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H04R1/40, H04R3/00
CPC Code(s): H04R1/406
Abstract: a sound pickup device includes a processor with hardware. the processor calculates a first relational expression between acoustic filter factors of acoustic filters applied to microphone acquisition signals acquired by two or more microphones, based on a multiplication factor at a sensitization control point with high sound pressure sensitivity by the two or more microphones and a transfer function between each of the two or more microphones and the sensitization control point. the processor calculates a second relational expression between the acoustic filter factors, based on information of a frequency of a sound source and an interval between the two or more microphones. the processor calculates each of the acoustic filter factors, based on the first relational expression and the second relational expression.
Inventor(s): Tomoko ADACHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Masahiro SEKIYA of Inagi Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): H04W72/0453
CPC Code(s): H04W72/0453
Abstract: a wireless communication device notifies another wireless communication device that one of a first frequency and a second frequency is set as a primary frequency, connects to the another wireless communication device at the first frequency and the second frequency, and in a case receiving information identifying that the another wireless communication device has a restriction on transmission and reception between the second frequency and the first frequency, obtains an access right of a frame addressed to the another wireless communication device at a secondary frequency other than the primary frequency from among the first frequency and the second frequency.
Inventor(s): Kentaro IWAI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akito SASAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H05K3/00, H05K1/03, H05K3/46
CPC Code(s): H05K3/0044
Abstract: a ceramic substrate for which the yield when forming a notched portion is improved is provided. a ceramic substrate according to an embodiment includes a front surface and a back surface. a notched portion is provided at one or more locations of the ceramic substrate. the notched portion has an opening portion. at least one angle (�) where the ceramic substrate is present when viewed from the front surface among angles of end portions of the opening portion is greater than 90 degrees.
20240324116. STORAGE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Hayato YAMAGUCHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Masahide TAKAZAWA of Hachioji Tokyo (JP) for kabushiki kaisha toshiba, Shinra YAMANAKA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Nobuhiro YAMAMOTO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Taichi OKANO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H05K5/00, H05K1/03, H05K1/05, H05K1/11, H05K3/00
CPC Code(s): H05K5/0069
Abstract: according to one embodiment, a storage includes a flexible printed circuit board and an electronic component. the flexible printed circuit board includes a first insulating layer, a first conductive layer on a first surface of the first insulating layer, and a second conductive layer on a second surface of the first insulating layer. the second surface is opposite the first surface. the first conductive layer is provided with a land. the second conductive layer covers the land via the first insulating layer in a first direction in which the first surface faces. the electronic component includes a pin joined to the land.
Kabushiki Kaisha Toshiba patent applications on September 26th, 2024
- Kabushiki Kaisha Toshiba
- B62D7/15
- CPC B62D7/159
- Kabushiki kaisha toshiba
- B65D1/36
- B65B5/08
- B65D85/58
- CPC B65D1/36
- C25B1/23
- C25B1/02
- C25B13/02
- CPC C25B1/23
- C25B3/26
- C25B1/04
- C25B9/23
- C25B15/027
- C25B15/029
- C25B15/08
- CPC C25B3/26
- C25B9/19
- C25B11/031
- CPC C25B9/19
- C25B9/30
- C25B1/27
- C25B9/015
- C25B9/70
- CPC C25B9/30
- G01M5/00
- G01R33/02
- CPC G01M5/0066
- G01N21/25
- CPC G01N21/255
- G01N21/88
- CPC G01N21/8806
- G01N21/956
- CPC G01N21/95607
- G01N29/036
- G01N27/00
- CPC G01N29/036
- G01N35/00
- CPC G01N35/00603
- G01R31/392
- G01R31/36
- G01R31/382
- H01M10/42
- H01M10/48
- H02J7/00
- CPC G01R31/392
- G02B21/00
- G02B21/12
- G02B21/36
- CPC G02B21/0032
- G06F17/16
- CPC G06F17/16
- G06F18/22
- CPC G06F18/22
- G06F21/32
- G06F21/44
- CPC G06F21/32
- G06N3/044
- G06N3/049
- CPC G06N3/044
- G06N10/60
- CPC G06N10/60
- G06N20/00
- CPC G06N20/00
- G06Q10/0835
- CPC G06Q10/08355
- G06Q10/087
- CPC G06Q10/087
- G07C9/15
- G06T7/70
- G06V40/16
- G07C9/25
- CPC G07C9/15
- G11B5/012
- G11B5/02
- G11B5/105
- G11B5/48
- G11B5/55
- CPC G11B5/012
- CPC G11B5/02
- G11B5/455
- CPC G11B5/455
- CPC G11B5/4833
- CPC G11B5/486
- G11B5/31
- CPC G11B5/5508
- G11B5/596
- CPC G11B5/59688
- G11B5/60
- G11B5/40
- CPC G11B5/6011
- CPC G11B5/607
- G11B20/10
- CPC G11B20/10388
- CPC G11B20/10481
- G11B20/18
- CPC G11B20/1833
- G11B5/09
- CPC G11B20/1889
- G11B33/12
- G11B19/20
- CPC G11B33/128
- H01B12/06
- C04B35/45
- CPC H01B12/06
- H01J37/12
- CPC H01J37/12
- H01J37/147
- CPC H01J37/1472
- H01L21/67
- B32B43/00
- CPC H01L21/67132
- H01L21/78
- H01L21/683
- CPC H01L21/78
- H01L23/31
- H01L23/00
- H01L23/13
- H01L23/498
- H05K1/18
- CPC H01L23/3121
- H01L23/29
- H01L25/16
- CPC H01L23/3135
- H01L23/495
- CPC H01L23/49562
- H01L29/78
- H01L23/58
- H01L27/12
- CPC H01L23/562
- H01L21/3065
- H01L21/3213
- CPC H01L23/585
- H01L25/065
- CPC H01L24/05
- CPC H01L24/14
- CPC H01L24/32
- H01L23/64
- CPC H01L24/48
- CPC H01L24/73
- H01L25/18
- CPC H01L25/18
- H01L27/02
- H01L29/06
- H01L29/16
- CPC H01L27/0255
- CPC H01L27/0288
- H01L27/06
- H01L29/739
- H01L29/861
- CPC H01L27/0664
- H01L27/07
- H01L29/417
- H01L29/872
- CPC H01L27/0727
- H01G4/08
- H01G4/228
- CPC H01L28/91
- H01L21/784
- H01L23/544
- H01L29/66
- CPC H01L29/0657
- H01L29/08
- CPC H01L29/0696
- CPC H01L29/1608
- H01L29/10
- H01L29/36
- H01L29/32
- H01L21/22
- CPC H01L29/32
- H01L29/40
- H01L29/778
- CPC H01L29/404
- H01L29/20
- CPC H01L29/41725
- CPC H01L29/7393
- CPC H01L29/7397
- CPC H01L29/7786
- H01M4/485
- CPC H01M4/485
- H01M4/62
- H01M10/38
- H01M4/525
- H01M4/505
- H01M50/284
- H01M50/296
- H01M50/574
- CPC H01M4/525
- CPC H01M4/623
- B60L3/00
- H01M4/36
- H01M50/204
- H01M50/249
- CPC H01M4/628
- H01M10/0562
- B60L7/10
- CPC H01M10/0562
- H01P1/36
- CPC H01P1/36
- G06Q30/0273
- CPC H02J7/0048
- H02M3/155
- H02M1/08
- CPC H02M3/155
- H03F3/45
- H03F1/26
- H03F1/56
- CPC H03F3/45475
- H03K17/0412
- H03K17/16
- H03K17/693
- CPC H03K17/04123
- H03K17/06
- H03K5/24
- H03K17/08
- CPC H03K17/063
- H03K17/687
- CPC H03K17/166
- H03K17/691
- H02M1/34
- CPC H03K17/691
- H03K17/785
- CPC H03K17/785
- H04B10/29
- H04J14/08
- CPC H04B10/29
- H04B10/516
- CPC H04B10/516
- H04L9/08
- CPC H04L9/0855
- H04N5/262
- B60R1/26
- G06T3/4038
- G06T11/00
- G06T11/60
- H04N5/272
- H04N7/18
- H04N23/81
- H04N23/90
- CPC H04N5/2628
- H04N21/4363
- H04N21/436
- CPC H04N21/43635
- H04R1/40
- H04R3/00
- CPC H04R1/406
- H04W72/0453
- CPC H04W72/0453
- H05K3/00
- H05K1/03
- H05K3/46
- CPC H05K3/0044
- H05K5/00
- H05K1/05
- H05K1/11
- CPC H05K5/0069
