Intel corporation (20240332112). CHIP-SCALE PACKAGE ARCHITECTURES CONTAINING A DIE BACK SIDE METAL AND A SOLDER THERMAL INTERFACE MATERIAL simplified abstract

CHIP-SCALE PACKAGE ARCHITECTURES CONTAINING A DIE BACK SIDE METAL AND A SOLDER THERMAL INTERFACE MATERIAL

Organization Name

intel corporation

Inventor(s)

Susmriti Das Mahapatra of Tempe AZ (US)

Malavarayan Sankarasubramanian of Chandler AZ (US)

Shenavia Howell of Chandler AZ (US)

John Harper of Chandler AZ (US)

Mitul Modi of Phoenix AZ (US)

CHIP-SCALE PACKAGE ARCHITECTURES CONTAINING A DIE BACK SIDE METAL AND A SOLDER THERMAL INTERFACE MATERIAL - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240332112 titled 'CHIP-SCALE PACKAGE ARCHITECTURES CONTAINING A DIE BACK SIDE METAL AND A SOLDER THERMAL INTERFACE MATERIAL

Simplified Explanation: The integrated circuit package described in the patent application includes a die with a front side and a back side. A solder thermal interface material (STIM) made of a first metal is placed over the backside of the die. The STIM has a high thermal conductivity of at least 40 W/mK. Additionally, a die backside material (DBM) made of a second metal is placed over the STIM, with the DBM having a coefficient of thermal expansion (CTE) of at least 18×10m/mK. The interface between the STIM and the DBM contains at least one intermetallic compound (IMC) of the first and second metals.

• The integrated circuit package includes a die with a front and back side.
• A solder thermal interface material (STIM) made of a first metal is placed on the backside of the die.
• The STIM has a high thermal conductivity of at least 40 W/mK.
• A die backside material (DBM) made of a second metal is placed over the STIM.
• The DBM has a coefficient of thermal expansion (CTE) of at least 18×10m/mK.
• The interface between the STIM and the DBM contains at least one intermetallic compound (IMC) of the first and second metals.

Potential Applications: 1. Semiconductor industry for improved thermal management. 2. Electronics manufacturing for enhanced heat dissipation. 3. Aerospace and automotive industries for reliable thermal performance in harsh environments.

Problems Solved: 1. Addressing thermal management challenges in integrated circuits. 2. Improving heat dissipation efficiency in electronic devices. 3. Enhancing reliability and performance of semiconductor components.

Benefits: 1. Increased thermal conductivity for better heat transfer. 2. Improved reliability and longevity of electronic devices. 3. Enhanced performance in high-temperature environments.

Commercial Applications: Title: Advanced Thermal Management Solutions for Integrated Circuits This technology can be utilized in: 1. High-performance computing systems. 2. Automotive electronics for improved reliability. 3. Aerospace applications for enhanced thermal performance.

Questions about Integrated Circuit Package: 1. How does the high thermal conductivity of the STIM benefit the overall performance of the integrated circuit package? 2. What are the potential implications of using the DBM with a high CTE in various industries?

Original Abstract Submitted

an integrated circuit (ic) package comprising a die having a front side and a back side. a solder thermal interface material (stim) comprising a first metal is over the backside. the tim has a thermal conductivity of not less than 40 w/mk; and a die backside material (dbm) comprising a second metal over the stim, wherein the dbm has a cte of not less than 18�10m/mk, wherein an interface between the stim and the dbm comprises at least one intermetallic compound (imc) of the first metal and the second metal.